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參數資料
| 型號： | A48P3616 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | CAP 270PF 50V CERAMIC MONO 5% |
| 中文描述： | 8米× 16位DDR內存 |
| 文件頁數： | 22/62頁 |
| 文件大小： | 2214K |
| 代理商： | A48P3616 |
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Preliminary
A48P3616
8M X 16 Bit DDR DRAM
Preliminary (September 2005, Version 0.0)
21
AMIC Technology, Corp.
A Read burst may be followed by, or truncated with, a
Precharge command to the same bank (provided that Auto
Precharge was not activated). The Precharge command
should be issued x cycles after the Read command, where x
equals the number of desired data element pairs (pairs are
required by the 2n prefetch architecture). This is shown in
timing figure Read to Precharge: CAS Latencies (Burst
Length = 4 or 8) on page37 for Read latencies of 2 and 2.5.
Following the Precharge command, a subsequent command
to the same bank cannot be issued until t
RP
is met. Note that
part of the row precharge time is hidden during the access of
the last data elements.
In the case of a Read being executed to completion, a
Precharge command issued at the optimum time (as
described above) provides the same operation that would
result from the same Read burst with Auto Precharge enabled.
The disadvantage of the Precharge command is that it
requires that the command and address busses be available
at the appropriate time to issue the command. The advantage
of the Precharge command is that it can be used to truncate
bursts.
Writes
Write bursts are initiated with a Write command, as shown in
timing figure
Write Command
on page 38.
The starting column and bank addresses are provided with
the Write command, and Auto Precharge is either enabled or
disabled for that access. If Auto Precharge is enabled, the
row being accessed is precharged at the completion of the
burst. For the generic Write commands used in the following
illustrations, Auto Precharge is disabled.
During Write bursts, the first valid data-in element is
registered on the first rising edge of DQS following the write
command, and subsequent data elements are registered on
successive edges of DQS. The Low state on DQS between
the Write command and the first rising edge is known as the
write preamble; the Low state on DQS following the last
data-in element is known as the write postamble. The time
between the Write command and the first corresponding
rising edge of DQS (t
DQSS
) is specified with a relatively wide
range (from 75% to 125% of one clock cycle), so most of the
Write diagrams that follow are drawn for the two extreme
cases (i.e. t
DQSS(min)
and t
DQSS(max)
). Timing figure
Write Burst
(Burst Length = 4)
on page 40 shows the two extremes of
t
DQSS
for a burst of four. Upon completion of a burst, assuming
no other commands have been initiated, the DQs and DQS
enters High-Z and any additional input data is ignored.
Data for any Write burst may be concatenated with or
truncated with a subsequent Write command. In either case,
a continuous flow of input data can be maintained. The new
Write command can be issued on any positive edge of clock
following the previous Write command.
The first data element from the new burst is applied after
either the last element of a completed burst or the last desired
data element of a longer burst which is being truncated. The
new Write command should be issued x cycles after the first
Write command, where x equals the number of desired data
element pairs (pairs are required by the 2n prefetch
architecture). Timing figure
Write to Write (Burst Length = 4)
on page 41 shows concatenated bursts of 4. An example of
nonconsecutive Writes is shown in timing figure
Write to Write:
Max DQSS, Non-Consecutive (Burst Length = 4)
on page 32.
Fullspeed random write accesses within a page or pages can
be performed as shown in timing figure
Random Write Cycles
(Burst Length = 2, 4 or 8)
on page 33. Data for any Write burst
may be followed by a subsequent Read command. To follow
a Write without truncating the write burst, t
WTR
(Write to Read)
should be met as shown in timing figure
Write to Read:
Non-Interrupting (CAS Latency = 2; Burst Length = 4)
on
page 43.
Data for any Write burst may be truncated by a subsequent
(interrupting) Read command. This is illustrated in timing
figures “Write to Read: Interrupting (CAS Latency =2; Burst
Length = 8)”, “Write to Read: Minimum D
QSS
, Odd Number of
Data (3 bit Write), Interrupting (CAS Latency = 2; Burst
Length = 8)”, and “Write to Read: Nominal D
QSS
, Interrupting
(CAS Latency = 2; Burst Length = 8)”. Note that only the
data-in pairs that are registered prior to the t
WTR
period are
written to the internal array, and any subsequent data-in must
be masked with DM, as shown in the diagrams noted
previously.
Data for any Write burst may be followed by a subsequent
Precharge command. To follow a Write without truncating the
write burst, t
WR
should be met as shown in timing figure
Write
to Precharge: Non-Interrupting (Burst Length = 4)
on page 39.
Data for any Write burst may be truncated by a subsequent
Precharge command, as shown in timing figures
Write to
Precharge: Interrupting (Burst Length = 4 or 8)
on page 48 to
Write to Precharge: Nominal DQSS (2 bit Write), Interrupting
(Burst Length = 4 or 8)
on page 49. Note that only the data-in
pairs that are registered prior to the t
WR
period are written to
the internal array, and any subsequent data in should be
masked with DM. Following the Precharge command, a
subsequent command to the same bank cannot be issued
until t
RP
is met.
In the case of a Write burst being executed to completion, a
Precharge command issued at the optimum time (as
described above) provides the same operation that would
result from the same burst with Auto Precharge. The
disadvantage of the Precharge command is that it requires
that the command and address busses be available at the
appropriate time to issue the command. The advantage of the
Precharge command is that it can be used to truncate bursts.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| A48P36AL | 制造商:Pentair Technical Products / Hoffman 功能描述:Panel 45.00x33.00 fits 48.00x3 , fits 48x36, Aluminum |
| A-48P36AL | 制造商:Pentair Technical Products / Hoffman 功能描述:Panel 45.00x33.00 fits 48.00x3 制造商:PENTAIR TECNICAL PRODCUTS 功能描述:Panel 45.00x33.00 fits 48.00x3 |
| A48P36G | 制造商:Pentair Technical Products / Hoffman 功能描述:Enclosure, Panel, 1.25x33.25x45.75 |
| A-48P36G | 制造商:Pentair Technical Products / Hoffman 功能描述:PANEL, ENCLOSURE, 45INX33IN, STEEL, Panel Material:Steel, Body Color:-, For Use With:NEMA 3R, 4, 4X, 12 , and 13 Enclosures, External Height - Imperial:45", External Height - Metric:1143mm, External Width - Imperial:33" , RoHS Compliant: Yes 制造商:PENTAIR TECNICAL PRODCUTS 功能描述:PANEL, ENCLOSURE, 45INX33IN, STEEL, Panel Material:Steel, Body Color:(Not Applic |
| A48P36SS6 | 制造商:Pentair Technical Products / Hoffman 功能描述:Panel 45.00x33.00 fits 48.00x3 , fits 48x36, SS Type 316 |
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