參數(shù)資料
型號： A48P3616
廠商： AMIC Technology Corporation
英文描述： CAP 270PF 50V CERAMIC MONO 5%
中文描述： 8米× 16位DDR內(nèi)存
文件頁數(shù)： 15/62頁
文件大?。?/td> 2214K
代理商： A48P3616
Preliminary
A48P3616
8M X 16 Bit DDR DRAM
Preliminary (September 2005, Version 0.0)
14
AMIC Technology, Corp.
Electrical Characteristics & AC Timing - Absolute Specifications (continued)
11. CK/
CK
slew rates are
≥
1.0V/ns.
12. These parameters guarantee device timing, but they are not necessarily tested on each device, and they may be guaranteed
by design or tester characterization.
13. For each of the terms in parentheses, if not already an integer, round to the next highest integer. t
CK
is equal to the actual
system clock cycle time. For example, for DDR266B at CL = 2.5, t
DAL
= (15ns/7.5ns) + (20ns/7.5ns) = 2 + 3 = 5.
14. An input setup and hold time derating table is used to increase t
IS
and t
IH
in the case where the input slew rate is below 0.5
V/ns.
Input Slew Rate
Delta (t
IS
)
Delta (t
IH
)
Unit
Note
0.5 V/ns
0
0
ps
1, 2
0.4 V/ns
+50
0
ps
1, 2
0.3 V/ns
+100
0
ps
1, 2
1. Input slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for rising
transitions.
2. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on each device.
1
5. An input setup and hold time derating table is used to increase t
DS
and t
DH
in the case where the I/O slew rate is below 0.5
V/ns.
Input Slew Rate
Delta (t
DS
)
Delta (t
DH
)
Unit
Note
0.5 V/ns
0
0
ps
1, 2
0.4 V/ns
+75
+75
ps
1, 2
0.3 V/ns
+150
+150
ps
1, 2
1. I/O slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for rising
transitions.
2. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on each device.
16. An I/O Delta Rise, Fall Derating table is used to increase t
DS
and t
DH
in the case where DQ, DM, and DQS slew rates differ.
Input Slew Rate
Delta (t
DS
)
Delta (t
DH
)
Unit
Note
0.0 V/ns
0
0
ps
1, 2, 3, 4
0.25 V/ns
+50
+50
ps
1, 2, 3, 4
0.5 V/ns
+100
+100
ps
1, 2, 3, 4
1. Input slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for rising
transitions.
2. Input slew rate is based on the larger of AC to AC delta rise, fall rate and DC to DC delta rise, fall rate.
3. The delta rise, fall rate is calculated as: [1/(slew rate 1)] - [1/(slew rate 2)]
For example: slew rate 1 = 0.5 V/ns; slew rate 2 = 0.4 V/ns
Delta rise, fall = (1/0.5) - (1/0.4) [ns/V]
= -0.5 ns/V
Using the table above, this would result in an increase in t
DS
and t
DH
of 100 ps.
4. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on each device.
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