參數(shù)資料
型號: A48P3616
廠商: AMIC Technology Corporation
英文描述: CAP 270PF 50V CERAMIC MONO 5%
中文描述: 8米× 16位DDR內(nèi)存
文件頁數(shù): 11/62頁
文件大小: 2214K
代理商: A48P3616
Preliminary
A48P3616
8M X 16 Bit DDR DRAM
Preliminary (September 2005, Version 0.0)
10
AMIC Technology, Corp.
AC Characteristics
(Notes 1-5 apply to the following Tables; Electrical Characteristics and DC Operating Conditions, AC Operating Conditions, I
DD
Specifications and Conditions, and Electrical Characteristics and AC Timing.)
1. All voltages referenced to V
SS
.
2. Tests for AC timing, I
DD
, and electrical, AC and DC characteristics, may be conducted at nominal reference/supply voltage
levels, but the related specifications and device operation are guaranteed for the full voltage range specified.
3. Outputs measured with equivalent load. Refer to the AC Output Load Circuit below.
4. AC timing and I
DD
tests may use a V
IL
to V
IH
swing of up to 1.5V in the test environment, but input timing is still referenced to
V
REF
(or to the crossing point for CK,
CK
), and parameter specifications are guaranteed for the specified AC input levels
under normal use conditions. The minimum slew rate for the input signals is 1V/ns in the range between V
IL (AC)
and V
IH (AC)
.
5. The AC and DC input level specifications are as defined in the SSTL_2 Standard (i.e. the receiver effectively switches as a
result of the signal crossing the AC input level, and remains in that state as long as the signal does not ring back above (below)
the DC input low (high) level.
AC Output Load Circuit Diagrams
AC Input Operating Conditions
(0 °C
T
A
70
°
C
;
V
DD
= V
DDQ
= 2.5V
±
0.2V (6K/75B); V
DD
= V
DDQ
= 2.6V
±
0.1V (5T/43), See AC Characteristics)
Symbol
Parameter/Condition
Min
Max
Unit
Note
V
IH (AC)
Input High (Logic 1) Voltage, DQ, DQS, and DM Signals
V
REF
+ 0.31
V
1, 2
V
IL (AC)
Input Low (Logic 0) Voltage, DQ, DQS, and DM Signals
V
REF
– 0.31
V
1, 2
V
ID (AC)
Input Differential Voltage, CK and
CK
Inputs
0.62
V
DDQ
+ 0.6
V
1, 2, 3
V
IX (AC)
Input Crossing Point Voltage, CK and
CK
Inputs
0.5*V
DDQ
– 0.2
0.5* V
DDQ
+ 0.2
V
1, 2, 4
Notes:
1. Input slew rate = 1V/ns.
2. Inputs are not recognized as valid until V
REF
stabilizes.
3. V
ID
is the magnitude of the difference between the input level on CK and the input level on
CK
.
4. The value of V
IX
is expected to equal 0.5*V
DDQ
of the transmitting device and must track variations in the DC level of the same.
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