參數(shù)資料
型號： 70T631S12DDGI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： SRAM
英文描述： 256K X 18 DUAL-PORT SRAM, 12 ns, PQFP144
封裝： 20 X 20 MM, 1.40 MM HIEGHT, GREEN, TQFP-144
文件頁數(shù)： 27/27頁
文件大小： 220K
代理商： 70T631S12DDGI
9
IDT70T633/1S
High-Speed 2.5V 512/256K x 18 Asynchronous Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD = 2.5V ± 100mV)
Symbol
Parameter
Test Conditions
70T633/1S
Unit
Min.
Max.
|ILI|
Input Leakage Current(1)
VDDQ = Max., VIN = 0V to VDDQ
___
10
A
|ILI|
JTAG & ZZ Input Leakage Current
(1,2)
VDD = Max., VIN = 0V to VDD
___
+30
A
|ILO|
Output Leakage Current(1,3)
CE0 = VIH or CE1 = VIL, VOUT = 0V to VDDQ
___
10
A
VOL (3.3V)
Output Low Voltage
(1)
IOL = +4mA, VDDQ = Min.
___
0.4
V
VOH (3.3V)
Output High Voltage(1)
IOH = -4mA, VDDQ = Min.
2.4
___
V
VOL (2.5V)
Output Low Voltage(1)
IOL = +2mA, VDDQ = Min.
___
0.4
V
VOH (2.5V)
Output High Voltage
(1)
IOH = -2mA, VDDQ = Min.
2.0
___
V
5670 tbl 09
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range(VDD = 2.5V ± 100mV)
NOTES:
1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, using "AC TEST CONDITIONS".
2. f = 0 means no address or control lines change. Applies only to input at CMOS level standby.
3. VDD = 2.5V, TA = 25°C for Typ. values, and are not production tested. IDD DC(f=0) = 100mA (Typ).
4.
CEX = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VDDQX - 0.2V
CEX > VDDQX - 0.2V means CE0X > VDDQX - 0.2V or CE1X - 0.2V
"X" represents "L" for left port or "R" for right port.
5. ISB1, ISB2 and ISB4 will all reach full standby levels (ISB3) on the appropriate port(s) if ZZL and /or ZZR = VIH.
6. 8ns Commercial and 10ns Industrial speed grades are available in BF-208 and BC-256 packages only.
NOTES:
1. VDDQ is selectable (3.3V/2.5V) via OPT pins. Refer to page 6 for details.
2. Applicable only for TMS, TDI and
TRST inputs.
3. Outputs tested in tri-state mode.
70T633/1S8(6)
Com'l Only
70T633/1S10
Com'l
& Ind(6)
70T633/1S12
Com'l
& Ind
70T633/1S15
Com'l Only
Symbol
Parameter
Test Condition
Version
Typ.(4)
Max.
Typ.(4)
Max.
Typ.(4)
Max.
Typ.(4)
Max.
Unit
IDD
Dynamic Operating
Current (Both
Ports Active)
CEL and CER= VIL,
Outputs Disabled
f = fMAX(1)
COM'L
S
350
475
300
405
300
355
225
305
mA
IND
S
____
300
445
300
395
____
ISB1(6)
Standby Current
(Both Ports - TTL
Level Inputs)
CEL = CER = VIH
f = fMAX(1)
COM'L
S
115
140
90
120
75
105
60
85
mA
IND
S
____
90
145
75
130
____
ISB2(6)
Standby Current
(One Port - TTL
Level Inputs)
CE"A" = VIL and CE"B" = VIH(5)
Active Port Outputs Disabled,
f = fMAX(1)
COM'L
S
240
315
200
265
180
230
150
200
mA
IND
S
____
200
290
180
255
____
ISB3
Full Standby Current
(Both Ports - CMOS
Level Inputs)
Both Ports
CEL and
CER > VDDQ - 0.2V,
VIN > VDDQ - 0.2V or VIN < 0.2V,
f = 0(2)
COM'L
S
210
2
10
210
2
10
mA
IND
S
____
2202
20
____
ISB4(6)
Full Standby Current
(One Port - CMOS
Level Inputs)
CE"A" < 0.2V and
CE"B" > VDDQ - 0.2V(5),
VIN > VDDQ - 0.2V or VIN < 0.2V,
Active Port, Outputs Disabled,
f = fMAX(1)
COM'L
S
240
315
200
265
180
230
150
200
mA
IND
S
____
200
290
180
255
____
IZZ
Sleep Mode Current
(Both Ports - TTL
Level Inputs)
ZZL = ZZR = VIH
f = fMAX(1)
COM'L
S
210
2
10
210
2
10
mA
IND
S
____
2202
20
____
5670 tbl 10
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