參數(shù)資料
型號： 70T631S12DDGI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： SRAM
英文描述： 256K X 18 DUAL-PORT SRAM, 12 ns, PQFP144
封裝： 20 X 20 MM, 1.40 MM HIEGHT, GREEN, TQFP-144
文件頁數(shù)： 25/27頁
文件大小： 220K
代理商： 70T631S12DDGI
7
IDT70T633/1S
High-Speed 2.5V 512/256K x 18 Asynchronous Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
NOTE:
1. "H" = VIH, "L" = VIL, "X" = Don't Care.
Truth Table I—Read/Write and Enable Control(1)
OE
SEM
CE0
CE1
UB
LB
R/
W
ZZ
Upper Byte
I/O9-17
Lower Byte
I/O0-8
MODE
X
H
X
L
High-Z
Deselected–Power Down
X
H
X
L
X
L
High-Z
Deselected–Power Down
X
H
L
H
X
L
High-Z
Both Bytes Deselected
X
H
LH
H
L
LL
High-Z
DIN
Write to Lower Byte
X
H
LH
LL
DIN
High-Z
Write to Upper Byte
X
H
L
H
LLL
L
DIN
Write to Both Bytes
LH
L
H
L
H
L
High-Z
DOUT
Read Lower Byte
L
H
LH
H
L
DOUT
High-Z
Read Upper Byte
LH
L
H
L
H
L
DOUT
Read Both Bytes
H
L
H
L
X
L
High-Z
Outputs Disabled
XXXX
XXXH
High-Z
High-Z Sleep Mode
5670 tbl 02
Truth Table II – Semaphore Read/Write Control(1)
NOTES:
1. There are eight semaphore flags written to I/O0 and read from all the I/Os (I/O0-I/O17). These eight semaphore flags are addressed by A0-A2.
2.
CE = L occurs when CE0 = VIL and CE1 = VIH. CE = H when CE0 = VIH and/or CE1 = VIL.
3. Each byte is controlled by the respective
UB and LB. To read data UB and/or LB = VIL.
Inputs
(1)
Outputs
Mode
CE(2)
R/
W
OE
UB
LB
SEM
I/O1-17
I/O0
H
LLL
L
DATAOUT
Read Data in Semaphore Flag
(3)
H
↑
XX
L
X
DATAIN
Write I/O0 into Semaphore Flag
L
X
XXX
L
______
Not Allowed
5670 tbl 03
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