參數(shù)資料
型號(hào)： 4565B2
元件分類： 數(shù)字傳輸電路
英文描述： ATM/SONET/SDH SUPPORT CIRCUIT, PBGA909
封裝： PLASTIC, BGA-909
文件頁數(shù)： 16/61頁
文件大小： 1691K
代理商： 4565B2
Hardware Design Guide, Revision 2
4565B Ultramapper Full Transport Retiming Device
December 17, 2003
622/155 Mbits/s SONET/SDH x DS3/E3/DS2/DS1/E1
Agere Systems Inc.
23
AG14
CTAPTL
—
Center Tap TL. LVDS buffer terminator center tap for TLSDATAP/N. An optional
0.1 F capacitor, connected between CTAP pin and ground, will improve the com-
mon-mode rejection of the LVDS input buffers.
Table 2-8. Multirate Crossconnect (MRXC) Block, TOAC Input and Output Channels
Pin
Symbol
Type
Name/Description
AM12
RTOACCLK
O
Receive Transport Overhead Access Channel Clock. The frequency of this clock is
determined by the TOAC provisioning registers.
AL12 RTOACDATA
O
Receive Transport Overhead Access Channel Data. 622/155 Mbits/s transport overhead
bytes are output on this pin. The content is determined by the TOAC provisioning registers.
AN17 RTOACSYNC
O
Receive Transport Overhead Access Channel Sync. Active-high 8 kHz frame sync. It is
active during the clock period of the first bit of each frame.
AH8
TTOACCLK
O
Transmit Transport Overhead Access Channel Clock. The frequency of this clock is
determined by the TOAC provisioning registers.
AL16
TTOACDATA I pd Transmit Transport Overhead Access Channel Data. Input for the transport overhead
bytes.
AP18 TTOACSYNC
O
Transmit Transport Overhead Access Channel Sync. Active-high 8 kHz frame sync. It is
active during the clock period of the first bit of each frame.
Table 2-9. Multirate Crossconnect (MRXC) Block, POAC Input and Output Channels
Pin
Symbol
Type
Name/Description
AM17
RPOACCLK
O
Receive Path Overhead Access Channel Clock. Output for the path
overhead bytes. This is a 3-state output pin controlled by register provi-
sioning.
AG17
RPOACDATA
O
Receive Path Overhead Access Channel Data. Output for the path
overhead bytes. This pin can be 3-stated.
AP19
RPOACSYNC
O
Receive Path Overhead Access Channel Sync. Output for POAC
channel. Active-high during the first bit of each frame when the POAC is
connected to either the TMUX or STS1LT. Active-high during the LSB of
the last byte of the frame when connected to the SPEMPR. This pin can
be individually 3-stated.
AL17
TPOACCLK
O
Transmit Path Overhead Access Channel Clock. Serial access chan-
nel clock output for the path overhead bytes. This pin can be individually
3-stated.
AK17
TPOACDATA
I pd
Transmit Path Overhead Access Channel Data. Serial access channel
data input for the path overhead bytes.
AP20
TPOACSYNC
O
Transmit Path Overhead Access Channel Sync. Output for POAC
channel. Active-high during the first bit of each frame when the POAC is
connected to either the TMUX, the STS1LT, or the SPEMPR. This pin can
be individually 3-stated.
Table 2-10. DS3/E3/STS-1 Out
Pin
Symbol
Type
Name/Description
AF4, AG2, AK1,
AH1, AA6, V2
DS3POSDATAOUT[6:1]
O
DS3/E3/STS-1 Positive Data Output. Either contains the positive-rail of
the B3ZS/HDB3 encoded output data, or single-rail NRZ data.
AJ2, AG3, AL1,
AJ1, AC4, AC3
DS3NEGDATAOUT[6:1]
O
DS3/E3/STS-1 Negative Data Output. Negative-rail B3ZS/HDB3 en-
coded output data. Not used in single-rail mode (held low in this case).
Table 2-7. STS Cross Connect (STSXC) Block, STS-3/STM-1 Mate Interconnect
Pin
Symbol
Type
Name/Description
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