參數(shù)資料
型號: 28F640W30
廠商: Intel Corp.
元件分類: DRAM
英文描述: 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30)
中文描述: 1.8伏英特爾無線閃存的3伏的I / O和SRAM(寬30)
文件頁數(shù): 51/82頁
文件大?。?/td> 749K
代理商: 28F640W30
28F6408W30, 28F3204W30, 28F320W30, 28F640W30
Preliminary
45
NOTES:
1.
Section 4.2.2,
First Latency Count (LC2
0)
on page 14
describes how to insert clock cycles during the initial
access.
2. WAIT (shown active low) can be configured to assert either during or one data cycle before valid data.
Figure 18. 4 Word Burst Read Waveform
V
IH
V
IL
V
OH
V
OL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
Valid
Address
V
IH
V
IL
Note 1
V
OH
V
OL
Valid
Output
Valid
Output
Valid
Output
Valid
Output
High Z
R105
R102
R301
R302
R306
R101
R2
R106
R103
R3
R4
R7
R304
R5
R305
R8
R9
0
1
RST# [P]
WAIT [T]
WE# [W]
OE# [G]
CE# [E]
ADV# [V]
Address [A]
CLK [C]
Data [D/Q]
Note 2
R104
R303
R10
R307
High Z
R308
R309
R310
High Z
High Z
Figure 19. Clock Input AC Waveform
CLK [C]
V
IH
V
IL
R203
R202
R201
CLKINPUT.WMF
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