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參數(shù)資料
| 型號(hào)： | 21928 |
| 英文描述： | Low-Frequency, Spread-Spectrum EconOscillator |
| 中文描述： | 的AMD - K6 - 2E處理器數(shù)據(jù)手冊3DNow?。考夹g(shù)手冊 |
| 文件頁數(shù)： | 41/72頁 |
| 文件大?。?/td> | 845K |
| 代理商： | 21928 |
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Chapter 2
3DNow! Instruction Set
31
21928G/0—March 2000
3DNow! Technology Manual
PFCMPGT
mnemonic
opcode/imm8
description
PFCMPGT mmreg1, mmreg2/mem64
0Fh 0Fh / A0h
Packed floating-point comparison, greater than
Privilege:
Registers Affected:
Flags Affected:
Exceptions Generated:
none
MMX
none
PFCMPGT is a vector instruction that performs a comparison of the destination
operand and the source operand and generates all one bits or all zero bits based on the
result of the corresponding comparison. Table 10 on page 32 shows the numerical
range of the PFCMPGT instruction.
The PFCMPGT instruction performs the following operations:
IF (mmreg1[31:0] > mmreg2/mem64[31:0])
THEN mmreg1[31:0] = FFFF_FFFFh
ELSE mmreg1[31:0] = 0000_0000h
IF (mmreg1[63:32] > mmreg2/mem64[63:32]
THEN mmreg1[63:32] = FFFF_FFFFh
ELSE mmreg1[63:32] = 0000_0000h
Exception
Invalid opcode (6)
Device not available (7)
Real
X
X
Virtual
8086
X
X
Protected Description
X
X
The emulate instruction bit (EM) of the control register (CR0) is set to 1.
Save the floating-point or MMX state if the task switch bit (TS) of the control
register (CR0) is set to 1.
During instruction execution, the stack segment limit was exceeded.
During instruction execution, the effective address of one of the segment
registers used for the operand points to an illegal memory location.
One of the instruction data operands falls outside the address range 00000h
to 0FFFFh.
A page fault resulted from the execution of the instruction.
An exception is pending due to the floating-point execution unit.
Stack exception (12)
General protection (13)
X
X
Segment overrun (13)
X
X
Page fault (14)
Floating-point exception
pending (16)
Alignment check (17)
X
X
X
X
X
X
X
An unaligned memory reference resulted from the instruction execution,
and the alignment mask bit (AM) of the control register (CR0) is set to 1.
(In Protected Mode, CPL = 3.)
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參數(shù)描述 |
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