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參數(shù)資料
| 型號： | 21928 |
| 英文描述： | Low-Frequency, Spread-Spectrum EconOscillator |
| 中文描述： | 的AMD - K6 - 2E處理器數(shù)據(jù)手冊3DNow?。考夹g(shù)手冊 |
| 文件頁數(shù)： | 31/72頁 |
| 文件大?。?/td> | 845K |
| 代理商： | 21928 |
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Chapter 2
3DNow! Instruction Set
21
21928G/0—March 2000
3DNow! Technology Manual
PF2ID
mnemonic
opcode/imm8
description
PF2ID mmreg1, mmreg2/mem64
0Fh 0Fh / 1Dh
Converts packed floating-point operand to packed
32-bit integer
Privilege:
Registers Affected:
Flags Affected:
Exceptions Generated:
none
MMX
none
PF2ID is a vector instruction that converts a vector register containing
single-precision, floating-point operands to 32-bit signed integers using truncation.
Table 5 on page 22 shows the numerical range of the PF2ID instruction.
The PF2ID instruction performs the following operations:
IF (mmreg2/mem64[31:0] >= 2
31
)
THEN mmreg1[31:0] = 7FFF_FFFFh
ELSEIF (mmreg2/mem64[31:0] <= –2
31
)
THEN mmreg1[31:0] = 8000_0000h
ELSE mmreg1[31:0] = int(mmreg2/mem64[31:0])
IF (mmreg2/mem64[63:32] >= 2
31
)
THEN mmreg1[63:32] = 7FFF_FFFFh
ELSEIF (mmreg2/mem64[63:32] <= –2
31
)
THEN mmreg1[63:32] = 8000_0000h
ELSE mmreg1[63:32] = int(mmreg2/mem64[63:32])
Exception
Invalid opcode (6)
Device not available (7)
Real
X
X
Virtual
8086
X
X
Protected Description
X
X
The emulate instruction bit (EM) of the control register (CR0) is set to 1.
Save the floating-point or MMX state if the task switch bit (TS) of the control
register (CR0) is set to 1.
During instruction execution, the stack segment limit was exceeded.
During instruction execution, the effective address of one of the segment
registers used for the operand points to an illegal memory location.
One of the instruction data operands falls outside the address range 00000h
to 0FFFFh.
A page fault resulted from the execution of the instruction.
An exception is pending due to the floating-point execution unit.
Stack exception (12)
General protection (13)
X
X
Segment overrun (13)
X
X
Page fault (14)
Floating-point exception
pending (16)
Alignment check (17)
X
X
X
X
X
X
X
An unaligned memory reference resulted from the instruction execution,
and the alignment mask bit (AM) of the control register (CR0) is set to 1.
(In Protected Mode, CPL = 3.)
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| 21B | Low-Frequency Dual EconOscillator |
| 21C | Low-Frequency Dual EconOscillator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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| 219-2-8696-1 | 制造商:Airpax 功能描述:CIRCUIT BREAKER MAG-HYDR LEVER 制造商:Sensata Technologies 功能描述:219-2-8696-1 /Pole # 2 /Prod Family: 0209 |
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