
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 47
PIC16F87XA
4.5
PORTE and TRISE Register
PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6,
and RE2/CS/AN7), which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
The PORTE pins become the I/O control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>) is
set. In this mode, the user must make certain that the
TRISE<2:0> bits are set, and that the pins are configured
as digital inputs. Also ensure that ADCON1 is configured
for digital I/O. In this mode, the input buffers are TTL.
Register 4-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins are multiplexed with analog inputs. When
selected for analog input, these pins will read as
’
0
’
s.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
FIGURE 4-9:
PORTE BLOCK DIAGRAM
(IN I/O PORT MODE)
TABLE 4-9:
PORTE FUNCTIONS
Note:
PORTE and TRISE are not implemented
on the 28-pin devices.
Note:
On a Power-on Reset, these pins are con-
figured as analog inputs, and read as
‘
0
’
.
Data
Bus
WR
Port
WR
TRIS
RD Port
Data Latch
D
TRIS Latch
D
RD
TRIS
Schmitt
Trigger
Input
Buffer
Q
CK
Q
CK
EN
Q
D
EN
I/O pin
(1)
Note 1:
I/O pins have protection diodes to V
DD
and V
SS
.
Name
Bit#
Buffer Type
Function
RE0/RD/AN5
bit0
ST/TTL
(1)
I/O port pin or read control input in Parallel Slave Port mode or analog input:
RD
1
= Idle
0
= Read operation. Contents of PORTD register are output to PORTD
I/O pins (if chip selected).
I/O port pin or write control input in Parallel Slave Port mode or analog input:
WR
1
= Idle
0
= Write operation. Value of PORTD I/O pins is latched into PORTD
register (if chip selected).
I/O port pin or chip select control input in Parallel Slave Port mode or analog input:
CS
1
= Device is not selected
0
= Device is selected
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1:
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
RE1/WR/AN6
bit1
ST/TTL
(1)
RE2/CS/AN7
bit2
ST/TTL
(1)