
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 159
PIC16F87XA
15.2
Instruction Descriptions
ADDLW
Add Literal and W
Syntax:
Operands:
Operation:
Status Affected:
Description:
[
label
] ADDLW k
0
≤
k
≤
255
(W) + k
→
(W)
C, DC, Z
The contents of the W register
are added to the eight-bit literal ’k’
and the result is placed in the W
register.
ADDWF
Add W and f
Syntax:
Operands:
[
label
] ADDWF f,d
0
≤
f
≤
127
d
∈ [0,1]
(W) + (f)
→
(destination)
C, DC, Z
Add the contents of the W register
with register ’f’. If ’d’ is 0, the result
is stored in the W register. If ’d’ is
1, the result is stored back in
register ’f’.
Operation:
Status Affected:
Description:
ANDLW
AND Literal with W
Syntax:
Operands:
Operation:
Status Affected:
Description:
[
label
] ANDLW k
0
≤
k
≤
255
(W) .AND. (k)
→
(W)
Z
The contents of W register are
AND’ed with the eight-bit literal
'k'. The result is placed in the W
register.
ANDWF
AND W with f
Syntax:
Operands:
[
label
] ANDWF f,d
0
≤
f
≤
127
d
∈ [0,1]
(W) .AND. (f)
→
(destination)
Z
AND the W register with register
'f'. If 'd' is 0, the result is stored in
the W register. If 'd' is 1, the result
is stored back in register 'f'.
Operation:
Status Affected:
Description:
BCF
Bit Clear f
Syntax:
Operands:
[
label
] BCF f,b
0
≤
f
≤
127
0
≤
b
≤
7
0
→
(f<b>)
None
Bit 'b' in register 'f' is cleared.
Operation:
Status Affected:
Description:
BSF
Bit Set f
Syntax:
Operands:
[
label
] BSF f,b
0
≤
f
≤
127
0
≤
b
≤
7
1
→
(f<b>)
None
Bit 'b' in register 'f' is set.
Operation:
Status Affected:
Description:
BTFSS
Bit Test f, Skip if Set
Syntax:
Operands:
[
label
] BTFSS f,b
0
≤
f
≤
127
0
≤
b < 7
skip if (f<b>) = 1
None
If bit 'b' in register 'f' is '0', the next
instruction is executed.
If bit 'b' is '1', then the next instruc-
tion is discarded and a
NOP
is
executed instead, making this a
2T
CY
instruction.
Operation:
Status Affected:
Description:
BTFSC
Bit Test, Skip if Clear
Syntax:
Operands:
[
label
] BTFSC f,b
0
≤
f
≤
127
0
≤
b
≤
7
skip if (f<b>) = 0
None
If bit 'b' in register 'f' is '1', the next
instruction is executed.
If bit 'b', in register 'f', is '0', the
next instruction is discarded, and
a
NOP
is executed instead, making
this a 2T
CY
instruction.
Operation:
Status Affected:
Description: