
PIC16F87XA
DS39582A-page 46
Advance Information
2001 Microchip Technology Inc.
4.4
PORTD and TRISD Registers
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configureable as an input or
output.
PORTD can be configured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
FIGURE 4-8:
PORTD BLOCK DIAGRAM
(IN I/O PORT MODE)
TABLE 4-7:
PORTD FUNCTIONS
TABLE 4-8:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Note:
PORTD and TRISD are not implemented
on the 28-pin devices.
Data
Bus
WR
Port
WR
TRIS
RD Port
Data Latch
D
TRIS Latch
D
RD
TRIS
Schmitt
Trigger
Input
Buffer
I/O pin
(1)
Note 1:
I/O pins have protection diodes to V
DD
and V
SS
.
Q
CK
Q
CK
EN
Q
D
EN
Name
Bit#
Buffer Type
Function
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1:
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
Input/output port pin or parallel slave port bit0.
Input/output port pin or parallel slave port bit1.
Input/output port pin or parallel slave port bit2.
Input/output port pin or parallel slave port bit3.
Input/output port pin or parallel slave port bit4.
Input/output port pin or parallel slave port bit5.
Input/output port pin or parallel slave port bit6.
Input/output port pin or parallel slave port bit7.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
RESETS
08h
88h
89h
Legend:
x
= unknown,
u
= unchanged,
-
= unimplemented, read as '0'. Shaded cells are not used by PORTD.
PORTD
TRISD
TRISE
RD7
PORTD Data Direction Register
IBF
OBF
IBOV PSPMODE
RD6
RD5
RD4
RD3
RD2
RD1
RD0
xxxx xxxx
uuuu uuuu
1111 1111
1111 1111
—
PORTE Data Direction Bits
0000 -111
0000 -111