參數(shù)資料
型號： 16F871
廠商： Microchip Technology Inc.
英文描述： CAT 5E CROSSOVER PATCH CORD CABLE GREEN 6 FT
中文描述： 28/40-Pin 8位CMOS閃存微控制器
文件頁數(shù)： 70/156頁
文件大?。?/td> 2816K
代理商： 16F871
PIC16F870/871
DS30569A-page 70
Preliminary
1999 Microchip Technology Inc.
Steps to follow when setting up an Asynchronous
Reception:
1.
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 9.1).
2.
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
3.
If interrupts are desired, then set enable bit
RCIE.
4.
If 9-bit reception is desired, then set bit RX9.
5.
Enable the reception by setting bit CREN.
6.
Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE is set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
If any error occurred, clear the error by clearing
enable bit CREN.
7.
8.
9.
TABLE 9-6:
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
Resets
0Ch
PIR1
PSPIF
(1)
ADIF
RCIF
TXIF
—
CCP1IF
TMR2IF
TMR1IF
0000 -000
0000 -000
18h
RCSTA
SPEN
RX9
SREN
CREN
—
FERR
OERR
RX9D
0000 -00x
0000 -00x
1Ah
RCREG
USART Receive Register
PSPIE
(1)
0000 0000
0000 0000
8Ch
PIE1
ADIE
RCIE
TXIE
—
CCP1IE
TMR2IE
TMR1IE
0000 -000
0000 -000
98h
TXSTA
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D
0000 -010
0000 -010
99h
SPBRG
Baud Rate Generator Register
0000 0000
0000 0000
Legend:
Note 1:
x
= unknown,
-
= unimplemented locations read as '0'. Shaded cells are not used for asynchronous reception.
Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear.
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