參數(shù)資料
型號： 16F871
廠商： Microchip Technology Inc.
英文描述： CAT 5E CROSSOVER PATCH CORD CABLE GREEN 6 FT
中文描述： 28/40-Pin 8位CMOS閃存微控制器
文件頁數(shù)： 122/156頁
文件大?。?/td> 2816K
代理商： 16F871
PIC16F870/871
DS30569A-page 122
Preliminary
1999 Microchip Technology Inc.
14.2
DC Characteristics:
PIC16LF870/871 (Commercial, Industrial)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C
Min
Typ Max Units
≤
T
A
≤
+85°C for industrial
Conditions
Param
No.
Characteristic
Sym
D001
D002*
Supply Voltage
RAM Data Retention
Voltage (Note 1)
V
DD
start voltage to
ensure internal Power-on
Reset signal
V
DD
rise rate to ensure
internal Power-on Reset
signal
Brown-out Reset Voltage
Supply Current (Note 2,5) I
DD
V
DD
V
DR
2.0
-
-
5.5
-
V
V
LP, XT, RC osc configuration (DC - 4 MHz)
1.5
D003
V
POR
-
V
SS
-
V
See section on Power-on Reset for details
D004*
SV
DD
0.05
-
-
V/ms See section on Power-on Reset for details
D005
D010
V
BOR
3.7
-
4.0
0.6
4.35
2.0
V
BODEN bit in configuration word enabled
XT, RC osc configuration
F
OSC
= 4 MHz, V
DD
= 3.0V (Note 4)
D010A
-
20
35
mA
μ
A
LP osc configuration
F
OSC
= 32 kHz, V
DD
= 3.0V, WDT disabled
BOR enabled V
DD
= 5.0V
D015*
Brown-out Reset Current
(Note 6)
Power-down Current
(Note 3,5)
I
BOR
-
85
200
μ
A
D020
D021
D021A
D023*
I
PD
-
-
-
-
7.5
0.8
0.9
85
30
4.5
5
200
μ
A
μ
A
μ
A
μ
A
V
DD
= 3.0V, WDT enabled, -40
°
C to +85
°
C
V
DD
= 3.0V, WDT disabled, 0
°
C to +70
°
C
V
DD
= 3.0V, WDT disabled, -40
°
C to +85
°
C
BOR enabled V
DD
= 5.0V
Brown-out Reset Current
(Note 6)
Legend: * These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note1:
This is the limit to which V
DD
can be lowered without losing RAM data.
2:
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern and temperature also have an
impact on the current consumption.
The test conditions for all I
DD
measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to V
DD
MCLR = V
DD
; WDT enabled/disabled as specified.
3:
The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to V
DD
and V
SS
.
4:
For RC osc configuration, current through Rext is not included. The current through the resistor can be esti-
mated by the formula Ir = V
DD
/2Rext (mA) with Rext in kOhm.
5:
Timer1 oscillator (when enabled) adds approximately 20
μ
A to the specification. This value is from charac-
terization and is for design guidance only. This is not tested.
6:
The
current is the additional current consumed when this peripheral is enabled. This current should be
added to the base I
DD
or I
PD
measurement.
I
BOR
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