參數(shù)資料
型號： 16F871
廠商： Microchip Technology Inc.
英文描述： CAT 5E CROSSOVER PATCH CORD CABLE GREEN 6 FT
中文描述： 28/40-Pin 8位CMOS閃存微控制器
文件頁數(shù)： 57/156頁
文件大小： 2816K
代理商： 16F871
1999 Microchip Technology Inc.
Preliminary
DS30569A -page 57
PIC16F870/871
8.0
CAPTURE/COMPARE/PWM
MODULE
The Capture/Compare/PWM (CCP) module contains a
16-bit register which can operate as a:
16-bit Capture register
16-bit Compare register
PWM master/slave Duty Cycle register
Table 8-1 shows the resources used by the CCP mod-
ule. In the following sections, the operation of a CCP
module is described.
CCP1 Module:
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is gen-
erated by a compare match and will reset Timer1 and
start an A/D conversion (if the A/D module is enabled).
Additional information on CCP modules is available in
the PICmicro Mid-Range MCU Family Reference
Manual (DS33023) and in Application Note 594, “Using
the CCP Modules” (DS00594).
TABLE 8-1:
CCP MODE - TIMER
RESOURCES REQUIRED
REGISTER 8-1:
CCP1CON REGISTER (ADDRESS: 17h)
CCP Mode
Timer Resource
Capture
Compare
PWM
Timer1
Timer1
Timer2
U-0
—
bit7
U-0
—
R/W-0
CCP1X
R/W-0
CCP1Y
R/W-0
CCP1M3
R/W-0
CCP1M2
R/W-0
CCP1M1
R/W-0
CCP1M0
R =Readable bit
W =Writable bit
U =Unimplemented bit, read as ‘0’
- n =Value at POR reset
bit0
bit 7-6:
bit 5-4:
CCP1<X:Y>
: PWM Least Significant bits
Capture Mode: Unused
Compare Mode: Unused
PWM Mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
bit 3-0:
CCP1M<3:0>
: CCPx Mode Select bits
0000
= Capture/Compare/PWM off (resets CCP module)
0100
= Capture mode, every falling edge
0101
= Capture mode, every rising edge
0110
= Capture mode, every 4th rising edge
0111
= Capture mode, every 16th rising edge
1000
= Compare mode, set output on match (CCP1IF bit is set)
1001
= Compare mode, clear output on match (CCP1IF bit is set)
1010
= Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP pin is unaffected)
1011
= Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected); CCP1 resets
TMR1 and starts an A/D conversion (if A/D module is enabled)
11xx
= PWM mode
Unimplemented:
Read as ’0’
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