- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368730 > 16F630 (Microchip Technology Inc.) 14-Pin FLASH-Based 8-Bit CMOS Microcontrollers PDF資料下載
參數(shù)資料
| 型號(hào)： | 16F630 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 14-Pin FLASH-Based 8-Bit CMOS Microcontrollers |
| 中文描述： | 14引腳基于閃存的8位CMOS微控制器 |
| 文件頁(yè)數(shù)： | 68/132頁(yè) |
| 文件大?。?/td> | 2651K |
| 代理商： | 16F630 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)當(dāng)前第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)
PIC16F630/676
DS40039C-page 66
2003 Microchip Technology Inc.
TABLE 9-8:
SUMMARY OF INTERRUPT REGISTERS
9.5
Context Saving During Interrupts
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key
registers during an interrupt (e.g., W register and
STATUS register). This must be implemented in
software.
Example 9-2 stores and restores the STATUS and W
registers. The user register, W_TEMP, must be defined
in both banks and must be defined at the same offset
from the bank base address (i.e., W_TEMP is defined
at 0x20 in Bank 0 and it must also be defined at 0xA0
in Bank 1). The user register, STATUS_TEMP, must be
defined in Bank 0. The Example 9-2:
Stores the W register
Stores the STATUS register in Bank 0
Executes the ISR code
Restores the STATUS (and bank select bit
register)
Restores the W register
EXAMPLE 9-2:
SAVING THE STATUS AND
W REGISTERS IN RAM
9.6
Watchdog Timer (WDT)
The Watchdog Timer is a free running, on-chip RC
oscillator, which requires no external components. This
RC oscillator is separate from the external RC oscillator
of the CLKIN pin. That means that the WDT will run,
even if the clock on the OSC1 and OSC2 pins of the
device has been stopped (for example, by execution of
a
SLEEP
instruction). During normal operation, a WDT
time-out generates a device RESET. If the device is in
SLEEP mode, a WDT time-out causes the device to
wake-up and continue with normal operation. The WDT
can be permanently disabled by programming the
configuration bit WDTE as clear (Section 9.1).
9.6.1
WDT PERIOD
The WDT has a nominal time-out period of 18 ms, (with
no prescaler). The time-out periods vary with tempera-
ture, V
DD
and process variations from part to part (see
DC specs). If longer time-out periods are desired, a
prescaler with a division ratio of up to 1:128 can be
assigned to the WDT under software control by writing
to the OPTION register. Thus, time-out periods up to
2.3 seconds can be realized.
The
CLRWDT
and
SLEEP
instructions clear the WDT
and the prescaler, if assigned to the WDT, and prevent
it from timing out and generating a device RESET.
The TO bit in the STATUS register will be cleared upon
a Watchdog Timer time-out.
9.6.2
WDT PROGRAMMING
CONSIDERATIONS
It should also be taken in account that under worst case
conditions (i.e., V
DD
= Min., Temperature = Max., Max.
WDT prescaler) it may take several seconds before a
WDT time-out occurs.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOD
Value on all
other
RESETS
0Bh, 8Bh INTCON
GIE
PEIE
T0IE
INTE
RAIE
T0IF
INTF
RAIF
0000 0000
0000 000u
0Ch
PIR1
EEIF
ADIF
—
—
CMIF
—
—
TMR1IF
00-- 0--0
00-- 0--0
8Ch
PIE1
EEIE
ADIE
—
—
CMIE
—
—
TMR1IE
00-- 0--0
00-- 0--0
Legend: x = unknown, u = unchanged, - = unimplemented read as '0', q = value depends upon condition.
Shaded cells are not used by the Interrupt module.
MOVWF
W_TEMP
;copy W to temp register,
could be in either bank
;swap status to be saved into W
;change to bank 0 regardless of
current bank
;save status to bank 0 register
SWAPF
BCF
STATUS,W
STATUS,RP0
MOVWF
STATUS_TEMP
:
:(ISR)
:
SWAPF
STATUS_TEMP,W;swap STATUS_TEMP register into
W, sets bank to original state
STATUS
;move W into STATUS register
W_TEMP,F
;swap W_TEMP
W_TEMP,W
;swap W_TEMP into W
MOVWF
SWAPF
SWAPF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 16F84 | CAT 5E CROSSOVER, BLUE 15 FT PATCH CABLE |
| 16F84A | CAT 5E CROSSOVER PATCH CORD CABLE BLUE 20 FT |
| 16F871 | CAT 5E CROSSOVER PATCH CORD CABLE GREEN 6 FT |
| 16F872 | CAT 5E CROSSOVER PATCH CORD CABLE GREEN 10 FT |
| 16F876A | 28/40-pin Enhanced FLASH Microcontrollers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 16F684-I | 制造商:Microchip Technology Inc 功能描述: |
| 16F6H | 制造商:EDAL 制造商全稱:EDAL 功能描述:Silicon High Voltage Assembly |
| 16F6H1 | 制造商:EDAL 制造商全稱:EDAL 功能描述:Silicon High Voltage Assembly |
| 16F7674 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SMD TWEEZER HEAD |
| 16F7676 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CLIP KABELKIT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。