參數(shù)資料
型號(hào)： (Z)PSD813F1
英文描述： Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲(chǔ)器，256K位EEPROM，16K位SRAM)
中文描述： Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位閃速存儲(chǔ)器，256K位的EEPROM，16K的位的SRAM）
文件頁數(shù)： 65/130頁
文件大小： 650K
代理商： (Z)PSD813F1
Prelimnary
PSD813F Famly
61
The
PSD813F
Functional
Blocks
(cont.)
9.4.3.1 Control Register
Any bit set to ‘0’ in the Control Register sets the corresponding Port pin to MCU I/O Mode,
and a ‘1’ sets it to Address Out Mode. The default mode is MCU I/O. Only Ports A and B
have an associated Control Register.
9.4.3.2 Drection Register
The Direction Register, in conjunction with the output enable (except for Port D), controls
the direction of data flow in the I/O Ports. Any bit set to ‘1’ in the Direction Register will
cause the corresponding pin to be an output, and any bit set to ‘0’ will cause it to be an
input. The default mode for all port pins is input.
Figures 27 and 29 show the Port Architecture diagrams for Ports A/B and C, respectively.
The direction of data flow for Ports A, B, and C are controlled not only by the direction
register, but also by the output enable product term from the PLD AND array. If the output
enable product term is not active, the Direction Register has sole control of a given pin’s
direction.
An example of a configuration for a port with the three least significant bits set to output and
the remainder set to input is shown in Table 26. Since Port D only contains three pins, the
Direction Register for Port D has only the three least significant bits active.
Drection Register Bit
0
1
Port Pin Mode
Input
Output
Table 24. Port Pin Drection Control,
Output Enable PT. Not Defined
Drection Register Bit
0
0
1
1
Output Enable PT.
0
1
0
1
Port Pin Mode
Input
Output
Output
Output
Table 25. Port Pin Drection Control, Output Enable PT. Defined
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
1
1
1
Table 26. Port Drection Assignment Example
相關(guān)PDF資料
PDF描述
(Z)PSD813F3 Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲(chǔ)器，16K位SRAM)
(Z)PSD813F2(中文) Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲(chǔ)器，16K位SRAM)
(Z)PSD813F3R(中文) Multi-Chip-Module to Monolithic Flash PSD(閃速，在系統(tǒng)可編程微控制器外圍器件，0M位閃速存儲(chǔ)器，無SRAM)
(Z)PSD813F2 Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲(chǔ)器，16K位SRAM)
(Z)PSD813F3R Multi-Chip-Module to Monolithic Flash PSD(閃速，在系統(tǒng)可編程微控制器外圍器件，0M位閃速存儲(chǔ)器，無SRAM)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZPSD813F1-12JI 制造商:WSI 功能描述:
ZPSD813F1-15J 制造商:WSI 功能描述:
ZPSD813F1-15U 制造商:WSI 功能描述:
ZPSD813F1-15UI 制造商:WSI 功能描述:
ZPSD813F1-90U 制造商:WSI 功能描述:
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