參數(shù)資料
型號： (Z)PSD813F1
英文描述： Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲器，256K位EEPROM，16K位SRAM)
中文描述： Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位閃速存儲器，256K位的EEPROM，16K的位的SRAM）
文件頁數(shù)： 24/130頁
文件大?。?/td> 650K
代理商： (Z)PSD813F1
PSD813F Famly
Prelimnary
20
9.1.1.5.4 Read the OTP Row (PSD813F1 only)
There are 64 bytes of One-Time-Programmable (OTP) memory that reside in EEPROM.
These 64 bytes are in addition to the 32 Kbytes of EEPROM memory. A read of the
OTP row is done with an instruction composed of at least 4 operations: 3 specific write
operations and one to 64 read operations (see Table 9). During the read operation(s),
address bit A6 must be zero, while address bits A5-A0 define the OTP Row byte to be read
while any EEPROM sector select signal (EESi) is active. After reading the last byte, an
EEPROM Return instruction must be executed (see Table 9).
9.1.1.5.5 Read the Erase/ProgramStatus Bits
The PSD813F provides several status bits to be used by the microcontroller to confirm
the completion of an erase or programming instruction of Flash memory. Bits are also
available to show the status of writes to EEPROM. These status bits minimize the time that
the microcontroller spends performing these tasks and are defined in Table 10. The status
bits can be read as many times as needed.
FSi/
CSBOOTi
EESi
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
Data
Polling
Toggle
Flag
Error
Flag
Erase
Time-
out
Flash
V
IH
V
IL
X
X
X
X
EEPROM
V
IL
V
IH
Data
Polling
Toggle
Flag
X
X
X
X
X
X
Table 10. Status Bit
NOTES:
1. X = Not guaranteed value, can be read either 1 or 0.
2. DQ7-DQ0 represent the Data Bus bits, D7-D0.
3. FSi/CSBOOTi and EESi are active high.
The
PSD813F
Functional
Blocks
(cont.)
For Flash memory, the microcontroller can perform a read operation to obtain these status
bits while an erase or program instruction is being executed by the embedded algorithm.
See section 9.1.1.7 for details.
For EEPROM not in SDP mode, the microcontroller can perform a read operation to obtain
these status bits just after a data write operation. The microcontroller may write one to 64
bytes before reading the status bits. See section 9.1.1.6 for details.
For EEPROM in SDP mode, the microcontroller will perform a read operation to obtain
these status bits while an SDP write instruction is being executed by the embedded
algorithm. See section 9.1.1.1.3 for details.
相關(guān)PDF資料
PDF描述
(Z)PSD813F3 Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲器，16K位SRAM)
(Z)PSD813F2(中文) Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲器，16K位SRAM)
(Z)PSD813F3R(中文) Multi-Chip-Module to Monolithic Flash PSD(閃速，在系統(tǒng)可編程微控制器外圍器件，0M位閃速存儲器，無SRAM)
(Z)PSD813F2 Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位和256K位閃速存儲器，16K位SRAM)
(Z)PSD813F3R Multi-Chip-Module to Monolithic Flash PSD(閃速，在系統(tǒng)可編程微控制器外圍器件，0M位閃速存儲器，無SRAM)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZPSD813F1-12JI 制造商:WSI 功能描述:
ZPSD813F1-15J 制造商:WSI 功能描述:
ZPSD813F1-15U 制造商:WSI 功能描述:
ZPSD813F1-15UI 制造商:WSI 功能描述:
ZPSD813F1-90U 制造商:WSI 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*