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CHAPTER 2 V
R
4120A
Preliminary User’s Manual S14767EJ1V0UM00
95
Table 2-32. I64 Minor Operation Code (64-bit Only, I64-Type Instruction)
Instruction Bits
[
10:8
]
000
001
010
011
100
101
110
111
ldsp
Note 1
sdsp
Note 2
sdrasp
Note 3
dadjsp
Note 4
ldpc
Note 5
daddiu5
Note 6
dadiupc
Note 7
dadiusp
Note 8
Notes 1.
ldsp
sdsp
sdrasp : sd ra, immediate
dadjsp : daddiu sp, immediate
ldpc
: ld ry, immediate
daddiu5: daddiu ry, immediate
dadiupc : daddiu ry, pc, immediate
dadiusp : daddiu ry, sp, immediate
: ld ry, immediate
: sd ry, immediate
2.
3.
4.
5.
6.
7.
8.
2.3.7 Outline of instructions
This section describes the assembler syntax and defines each instruction. Instructions can be divided into the
following four types.
Load and Store instructions
Computational instructions
Jump and Branch instructions
Special instructions
2.3.7.1 PC-relative instructions
PC-relative instructions are the instruction format first defined among the MIPS16 instruction set. MIPS16 supports
both extension and non-extension through the Extend instruction for four PC-relative instructions.
Load Word
Load Doubleword
Add Immediate Unsigned
Doubleword Add Immediate Unsigned
LW rx, offset (pc)
LD ry, offset (pc)
ADDIU rx, pc, immediate
DADDIU ry, pc, immediate
All these instructions calculate the PC value of a PC-relative instruction or the PC value of the instruction
immediately preceding as the base address. The address calculation base using various function combinations is
shown next.