參數(shù)資料
型號(hào): XRT86VL3X
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 16/149頁
文件大小: 1274K
代理商: XRT86VL3X
XRT86VL3X
9
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.0
1.7
T1/E1 Fractional Interface
The individual time slots can be enabled/disabled to carry fractional DS-0 data. The purpose of this interface is
to enable one or more time slots in the PCM data (TxSER) to be replaced with the fractional DS-0 payload. If
this mode is selected, the dedicated hardware pin TxCHN1/T1FR is used to input the fractional DS-0 data
within the time slots that are enabled. The dedicated hardware pin RxCHN1/R1FR is used to output the
fractional DS-0 data within the time slots that are enabled.
Figure 9
is a simplified diagram of the Fractional
Interface.
F
IGURE
9. T1 F
RACTIONAL
I
NTERFACE
TSN - TSM
TxCHN1/T1FR
TxSERclk
TxSYNC
TxMSYNC
F
T1 Fractional Data
PCM TS[0-(N-1)]
PCM TS[(M+1)-23]
TxSER
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