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| 型號(hào)： | XRT86VL3X |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁(yè)數(shù)： | 115/149頁(yè) |
| 文件大?。?/td> | 1274K |
| 代理商： | XRT86VL3X |
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XRT86VL3X
108
REV. 1.2.0
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
9.0
APPENDIX A: DS-1/E1 FRAMING FORMATS
9.1
The E1 Framing Structure
A single E1 frame consists of 256 bits which is created 8000 times per second. This yields a bit-rate of
2.048Mbps. The 256 bits within each E1 frame are grouped into 32 octets or timeslots. These timeslots are
numbered from 0 to 31. Each timeslot is 8 bits in length and is transmitted most significant bit first, numbered
bit 0.
Figure 99
presents a diagram of a single E1 frame.
Not all of these timeslots are available to transmit voice or user data. For instance, timeslot 0 is always reserved for
system use and timeslot 16 is sometimes used (reserved) by the system. Hence, within each E1 frame, either 30
or 31 of the 32 timeslots are available for transporting user or voice data. In general, there are two types of E1
frames, FAS and Non-FAS. In any E1 data stream, the E1 frame begins with a FAS frame followed by Non-
FAS frame and then alternates between the two.
9.1.1
FAS Frame
Timeslot 0 within the FAS E1 frame contains a framing alignment pattern and therefore supports framing. The
bit-format of timeslot 0 is presented in
Table 7
. The Si bit within the FAS E1 Frame typically carries the results
of a CRC-4 calculation. The fixed framing pattern (e.g., 0, 0, 1, 1, 0, 1, 1) will be used by the Receive E1
Framer at the Remote terminal for frame synchronization/alignment purposes.
F
IGURE
99. S
INGLE
E1 F
RAME
D
IAGRAM
T
ABLE
7: B
IT
F
ORMAT
OF
T
IMESLOT
0
OCTET
WITHIN
A
FAS E1 F
RAME
B
IT
0
1
2
3
4
5
6
7
Value
SI
0
0
1
1
0
1
1
Function
International Bit
Frame Alignment Signaling (FAS) Pattern
Description-
Operation
In practice, the Si bit within the FAS E1 Frame carries the
results of a CRC-4 calculation, which is discussed in
greater detail in Section 9.2.1.
The fixed framing pattern (e.g., 0, 0, 1, 1, 0, 1, 1)
is used by the Receive E1 Framer at the Remote
terminal for frame synchronization/alignment
purposes.
Timeslot 0
Timeslot 1
Timeslot 29
0 1 2 3 4 5 6 7
Timeslot 30
Timeslot 31
E1 Frame
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT91L30_0611 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L306 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30IQ | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L31 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT86VL3X_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION |
| XRT86VL3X_0710 | 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION |
| XRT86VX38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION |
| XRT86VX38_09 | 制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
| XRT86VX38_0906 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION |
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