參數(shù)資料
型號: W83627SF
英文描述: W83627F plus Smart Card Reader Interface. VID Control. GP I/O?
中文描述: W83627F加上智能卡閱讀器接口。 VID控制。大獎賽的I / O?
文件頁數(shù): 67/147頁
文件大?。?/td> 1348K
代理商: W83627SF
W83627SF
PRELIMINARY
Publication Release Date: Nov. 2000
Revision 0.60
- 60 -
5.1.7 Bank0.Reg6 - Remote Infrared Config Register (RIR_CFG)
Power on default <7:0> = 0000,0000 binary
Bit
Name
Read/Write
Description
Select.
7-6
SMPSEL<1:0>
Read/Write
Sampling
methodology from the internal filter. Selected decoder
mode will determine the receive data format. The sampling
mode is shown as bellow:
SMPSEL<1:0> = 00 T-Period Sample Mode.
SMPSEL<1:0> = 01 Over-Sampling Mode.
SMPSEL<1:0> = 10 Over-Sampling with re-sync.
SMPSEL<1:0> = 11 FIFO Test Mode.
The T-period code format is defined as follows.
(Number of bits) - 1
Mode
Select
internal
decoder
The Bit value is set to 0, then the high pulse will be
received. The Bit value is set to 1, then no energy will be
received. The opposite results will be generated when the
bit RXINV (Bank0.Reg6.Bit0) is set to 1.
Low pass filter source selcetion.
LP_SL<1:0> = 00 Select raw IRRX signal.
LP_SL<1:0> = 01 Select R.B.P. signal
LP_SL<1:0> = 10 Select D.B.P. signal.
LP_SL<1:0> = 11 Reserved.
Receiver Demodulation Source Selection.
RXDMSL<1:0> = 00 select B.P. and L.P. filter.
RXDMSL<1:0> = 01 select B.P. but not L.P.
RXDMSL<1:0> = 10 Reserved.
RXDMSL<1:0> = 11 do not pass demodulation.
Baud Rate Pre-divisor. Set to 1, the baud rate generator
input clock is set to 1.8432M Hz which is set to pre-divisor
into 13. When set to 0, the pre-divisor is set to 1, that is,
the input clock of baud rate generator is set to 24M Hz.
Receiving Signal Invert. Write to 1, Invert the receiving
signal.
5-4
LP_SL<1:0>
Read/Write
3-2
RXDMSL<1:0>
Read/Write
1
PRE_DIV
Read/Write
0
RXINV
Read/Write
B7 B6 B5 B4
B2 B1 B0
B3
Bit value
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