參數資料
型號: W83627SF
英文描述: W83627F plus Smart Card Reader Interface. VID Control. GP I/O?
中文描述: W83627F加上智能卡閱讀器接口。 VID控制。大獎賽的I / O?
文件頁數: 59/147頁
文件大小: 1348K
代理商: W83627SF
W83627SF
PRELIMINARY
Publication Release Date: Nov. 2000
- 52 - Revision 0.60
4.2.4 Handshake Status Register (HSR) (Read/Write)
This register reflects the current state of four input pins for handshake peripherals such as a modem and
records changes on these pins.
1
2
3
4
5
6
7
0
RI falling edge (FERI)
DCD toggling (TDCD)
Clear to send (CTS)
Data set ready (DSR)
Ring indicator (RI)
Data carrier detect (DCD)
CTS toggling (TCTS)
DSRtoggling (TDSR)
Bit 7: This bit is the opposite of the DCD input. This bit is equivalent to bit 3 of HCR in loopback mode.
Bit 6: This bit is the opposite of the RI input. This bit is equivalent to bit 2 of HCR in loopback mode.
Bit 5: This bit is the opposite of the DSR input. This bit is equivalent to bit 0 of HCR in loopback mode.
Bit 4: This bit is the opposite of the CTS input. This bit is equivalent to bit 1 of HCR in loopback mode.
Bit 3: TDCD. This bit indicates that the DCD pin has changed state after HSR was read by the
CPU.
Bit 2: FERI. This bit indicates that the RI pin has changed from low to high state after HSR was read
by the CPU.
Bit 1: TDSR. This bit indicates that the DSR pin has changed state after HSR was read by the CPU.
Bit 0: TCTS. This bit indicates that the CTS pin has changed state after HSR was read.
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