參數(shù)資料
型號(hào)： W25Q80BWZPIP
廠商： WINBOND ELECTRONICS CORP
元件分類： PROM
英文描述： 8M X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝： 6 X 5 MM, GREEN , PLASTIC, WSON-8
文件頁(yè)數(shù)： 58/71頁(yè)
文件大小： 0K
代理商： W25Q80BWZPIP
W25Q80BW
Publication Release Date: January 26, 2011
- 61 -
Preliminary - Revision A
9.6 AC Electrical Characteristics
DESCRIPTION
SYMBOL
ALT
SPEC
UNIT
MIN
TYP
MAX
Clock frequency for all instructions
except Read Data instruction (03h)
FR
fC
D.C.
80
MHz
Clock frequency for Read Data instruction (03h)
fR
D.C.
50
MHz
Clock High, Low Time
for all instructions except Read Data (03h)
tCLH1,
tCLL1(1)
6
ns
Clock High, Low Time
for Read Data (03h) instruction
tCRLH,
tCRLL(1)
8
ns
Clock Rise Time peak to peak
tCLCH(2)
0.1
V/ns
Clock Fall Time peak to peak
tCHCL(2)
0.1
V/ns
/CS Active Setup Time relative to CLK
tSLCH
tCSS
5
ns
/CS Not Active Hold Time relative to CLK
tCHSL
5
ns
Data In Setup Time
tDVCH
tDSU
2
ns
Data In Hold Time
tCHDX
tDH
5
ns
/CS Active Hold Time relative to CLK
tCHSH
5
ns
/CS Not Active Setup Time relative to CLK
tSHCH
5
ns
/CS Deselect Time (for Array Read
Array Read)
tSHSL1
tCSH
10
ns
/CS Deselect Time (for Erase or Program
Read
Status Registers)
Volatile Status Register Write Time
tSHSL2
tCSH
50
ns
Output Disable Time
tSHQZ(2)
tDIS
7
ns
Clock Low to Output Valid
tCLQV1
tV1
7
ns
Clock Low to Output Valid (for Read ID instructions)
tCLQV2
tV2
7.5
ns
Output Hold Time
tCLQX
tHO
0
ns
/HOLD Active Setup Time relative to CLK
tHLCH
5
ns
Continued – next page
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