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參數(shù)資料
| 型號： | W25Q80BWZPIP |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 8M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 6 X 5 MM, GREEN , PLASTIC, WSON-8 |
| 文件頁數(shù)： | 19/71頁 |
| 文件大小： | 0K |
| 代理商： | W25Q80BWZPIP |
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W25Q80BW
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8.2.12 Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction except
that data is output on two pins; IO0 and IO1. This allows data to be transferred from the W25Q80BW at
twice the rate of standard SPI devices. The Fast Read Dual Output instruction is ideal for quickly
downloading code from Flash to RAM upon power-up or for applications that cache code-segments to
RAM for execution.
Similar to the Fast Read instruction, the Fast Read Dual Output instruction can operate at the highest
possible frequency of FR (see AC Electrical Characteristics). This is accomplished by adding eight
“dummy” clocks after the 24-bit address as shown in figure 11. The dummy clocks allow the device's
internal circuits additional time for setting up the initial address. The input data during the dummy clocks
is “don’t care”. However, the IO0 pin should be high-impedance prior to the falling edge of the first data
out clock.
Figure 11. Fast Read Dual Output Instruction Sequence Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W25Q80VZPI | 1M X 8 SPI BUS SERIAL EEPROM, DSO8 |
| W26B041H70LI | 256K X 16 STANDARD SRAM, 70 ns, PDSO44 |
| W26B04B-70LE | 256K X 16 STANDARD SRAM, 70 ns, PBGA48 |
| W29L102Q-20B | 64K X 16 FLASH 3.3V PROM, 200 ns, PDSO40 |
| W33D2011 | LIQUID CRYSTAL DISPLAY DRIVER, PQFP64 |
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參數(shù)描述 |
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| W25S243A-12 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
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