參數(shù)資料
型號(hào): VG36128161BT-7H
廠商: VANGUARD INTERNATIONAL SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, PLASTIC, TSOP2-54
文件頁(yè)數(shù): 56/69頁(yè)
文件大?。?/td> 1335K
代理商: VG36128161BT-7H
Document :1G5-0183
Rev.5
Page 6
VIS
VG36128401B / VG36128801B / VG36128161B
CMOS Synchronous Dynamic RAM
DC Characteristics 1
(Ta = 0 ~ 70°C, VDD = VDDQ = 3.3 0.3V, VSS = VSSQ = 0V, Ouput Open, unless otherwise noted)
NOTES
1. ICC(max) is specified at the output open condition.
2. Input signals are changed one time during 30ns.
3. Normal version: for example, VG36128401BT-6 / VG36128401BT-7H / VG36128401BT-7L / VG36128401BT-8H
4. Low power version: for example, VG36128401BTL-6 / VG36128401BTL-7H / VG36128401BTL-7L
/ VG36128401BTL-8H
Parameter
Symbol
Test Conditions
Organization
Limits (max.)
Unit Notes
-6
-7H
-7L
-8H
Operating current
ICC1
One bank active
tRC = tRC(MIN), tCLK = tCLK(MIN),
BL = 1, CL=3
x4
110
100
95
mA
1
x8
120
110
100
x16
140
130
120
Precharge standby cur-
rent in power down mode
ICC2P
CKE
VIL(MAX), tCK = 15ns
x4/x8/x16
2
mA
ICC2PS
CKE
VIL(MAX), CLK
VIL(MAX) x4/x8/x16
1
mA
Precharge standby cur-
rent in non power down
mode
ICC2N
CS
VCC - 0.2V
tCK = 15ns, CKE
VIH(MIN)
x4/x8/x16
25
mA
2
ICC2NS
CS
VCC - 0.2V
CLK
VIL(MAX), CKE VIH(MIN)
All input signals are stable.
x4/x8/x16
15
mA
Active standby current in
non power down mode
ICC3N
CS
VCC - 0.2V
tCK = 15ns, CKE
VIH(MIN)
x4/x8/x16
30
mA
2
ICC3NS
CS
VCC - 0.2V
CLK
VIL(MAX), CKE VIH(MIN)
All input signals are stable.
x4/x8/x16
20
mA
Operating current
(Burst mode)
ICC4
All banks active
tCK = tCK(MIN), BL=4, CL=3
x4
160
140
110
mA
x8
170
150
120
x16
180
160
130
Refresh current
ICC5
tRC = tRC(MIN), tCLK = tCLK(MIN)
x4/x8/x16
160
mA
Self refresh current
ICC6
CKE
0.2V
x4/x8/x16
2
mA
3
0.8
mA
4
CKE
V
CKE
V
CKE
V
CKE
V
CKE
V
CKE
V
CKE
V
CKE
V
DC Characteristics 2
(Ta = 0 ~ 70°C, VDD = VDDQ = 3.3 0.3V , VSS = VSSQ = 0V, unless otherwise noted)
Parameter
Symbol
Test Condition
Min
Max
Unit
Input leakage current (Inputs)
II (L)
0
VIN
VDD(MAX)
Pins not under test = 0V
-10
10
uA
Output leakage current (I/O pins)
IO (L)
0
VOUT
VDD(MAX)
DQ# in H - Z., DOUT is disabled
-10
10
uA
High level output voltage
VOH (DC) IOH = -2mA
2.4
V
Low level output voltage
VOL (DC) IOL = 2mA
0.4
V
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