參數(shù)資料
型號： VES1820X
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： Single chip DVB-C channel receiver(單片DVB-C頻道接收器)
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： MQFP-100
文件頁數(shù)： 24/40頁
文件大?。?/td> 182K
代理商： VES1820X
1999 March 01
24
Philips Semiconductors
Product specification
Single chip DVB-C channel receiver
VES1820X
13. BDR_MSB
0C
16
READ/WRITE
6 MSB bits : BDR[21:16] of the BAUD rate frequency to program.
The value BDR[21:0] to program is a function of the system frequency
(SYSCLK=2*SACLK) and of the symbol rate RS :
BDR_MSB
=
SYSCLK
Ndec
2
x
RS
x
24
2
NINT
0]
:
BDR[21
NINT : Nearest Integer value
Ndec : Number of decimations (see page 22)
14.BDR_INV
0D
16
READ/WRITE
BAUD RATE Inverse. The value BDRI[7:0] to program is a function of the cristal
frequency (XIN) and of the symbol rate RS :
BDRI[7:0]
=
Ndec
2
x
RS
SYSCLK
x
16
NINT
0]
:
BDRI[7
NINT : Nearest Integer value
Ndec : Number of decimations (see page 22)
If BDRI > 255, then set BDRI to 255.
15.GAIN
OE16 READ/WRITE
GNYQ[2:0] determines the gain of the Nyquist filter according to the following
table :
GNYQ[2:0]
GNYQ[2:0]
000
001
010
011
100
101
110
111
Gain
1
1.5
2
3
4
6
8
12
SFIL
SFIL selects which anti-aliasing filter is used.
Symbol Rate (SR)
SYSCLK/12.3 < SR < SYSCLK/8
SYSCLK/16 < SR < SYSCLK/12.3
SYSCLK/24.6 < SR < SYSCLK/16
SYSCLK/32 < SR < SYSCLK/24.6
SYSCLK/49.2 < SR < SYSCLK/32
SYSCLK/64 < SR < SYSCLK/49.2
SYSCLK/98.4 < SR < SYSCLK/64
SYSCLK/128 < SR < SYSCLK/98.4
SFIL
0
1
0
1
0
1
0
1
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