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參數(shù)資料
| 型號： | VES1820X |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Single chip DVB-C channel receiver(單片DVB-C頻道接收器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | MQFP-100 |
| 文件頁數(shù)： | 20/40頁 |
| 文件大小： | 182K |
| 代理商： | VES1820X |
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1999 March 01
20
Philips Semiconductors
Product specification
Single chip DVB-C channel receiver
VES1820X
DESCRIPTION OF INTERNAL REGISTERS
1. CONF
0016 READ/WRITE
The CLB signal clears the VES1820X through the I2C interface (soft reset). To
clear the VES1820X, first write CLB = 0 followed by CLB = 1. This soft reset will
not affect the internal I2C registers contents.
CLB
TRI
When TRI is set to "1", all VES1820X outputs are tristated.
When TRI = 0 (default value) all outputs are active.
QAM[2:0]
QAM[2:0] indicates the modulation type according to the following table :
QAM[2:0]
000
001
010
011
100
111
Modulation
16-QAM
32-QAM
64-QAM (default)
128-QAM (DVB)
256-QAM
128-QAM (new
mapping)
INVIQ
When INVIQ=1, I and Q internal base-band signals are swapped to match a
spectral inversion. The default is INVIQ=0, no swap.
IFS
IFS determines if the input signal, FI[8:0] is interpreted in offset binary (IFS = 0,
default) or in 2’s complement (IFS = 1). It must be set to 1 when internal ADC is
used.
STDBY
When STDBY is set to "1" the VES1820X enters a StanD-BY mode and its power
consumption is reduced to TBD. The default value is STDBY = "0" which means
that the VES1820X is active.
2. AGCREF
0116 READ/WRITE
AGC Reference parameter.
AGCR[7:0] allows to adjust the analog signal level at the input of the VES1820X.
Depending on the modulation type, AGCR[7:0] must be set as follows (decimal
values) :
AGCR[7:0]
AGCR[7:0]
140
140
106
120
92
Modulation
16-QAM
32-QAM
64-QAM (default)
128-QAM
256-QAM
3. AGCONF
02
16
READ/WRITE
KAGC[1:0] represents the AGC time constant. Default is KAGC[1:0] = 00.
The AGC loop bandwidth can be calculated with the following formula :
KAGC
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