參數(shù)資料
型號： UJA1065
廠商： NXP Semiconductors N.V.
英文描述： High-speed CAN/LIN fail-safe system basis chip
中文描述： 高速的CAN / LIN故障防護系統(tǒng)基礎(chǔ)芯片
文件頁數(shù)： 43/67頁
文件大?。?/td> 285K
代理商： UJA1065
9397 750 14409
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Objective data sheet
Rev. 01 — 10 August 2005
43 of 67
Philips Semiconductors
UJA1065
High-speed CAN/LIN fail-safe system basis chip
6.14 Test modes
6.14.1
Software Development mode
The Software Development mode is intended to support software developers in writing
and pre-testing application software without having to work around watchdog triggering
and without unwanted jumps to Fail-safe mode.
In Software Development mode the following events do not force of a system reset:
Watchdog overflow in Normal mode
Watchdog window miss
Interrupt time-out
Elapsed start-up time
However, the reset source information is still provided in the System Status register as if
there was a real reset event.
The exclusion of watchdog related resets allows simplified software testing, because
possible problems in the watchdog triggering can be indicated by interrupts instead of
resets. The SDM bit does not affect the watchdog behavior in Standby and Sleep mode.
This allows the cyclic wake-up behavior to be evaluated during Standby and Sleep mode
of the SBC.
All transitions to Fail-safe mode are disabled. This allows working with an external
emulator that clamps the reset line LOW in debugging mode. A V1 under voltage of more
than t
V1(CLT)
is the only exception that results in entering Fail-safe mode (to protect the
SBC). Transitions from Start-up mode to Restart mode are still possible.
Table 22:
Symbol
ISDM
ERREM
WDPRE
V1RTHC
Special mode register: status at reset
Name
Initialize Software Development Mode
Error pin emulation mode
Watchdog Prescale Factor
V1 Reset Threshold Control
Power-on
0 (no)
0 (EN function)
00 (factor 1)
00 (90 %)
Start-up
no change
no change
no change
no change
Restart
no change
no change
no change
00 (90 %)
Table 23:
Symbol
DIC
GP0[10:7]
GP0[6:0]
General purpose register 0 and general purpose feedback register 0: status at reset
Name
Device Identification Control
general purpose bits 10 to 7 (version)
general purpose bits 6 to 0 (SBC type)
Power-on
0 (Device ID)
Mask version
000 0101
(UJA1065)
Start-up
no change
no change
no change
Restart
no change
no change
no change
Table 24:
Symbol
GP1[11:0]
General purpose register 1 and general purpose feedback register 1: status at reset
Name
general purpose bits 11 to 0
Power-on
0000 0000 0000
Start-up
no change
Restart
no change
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UJA1065TW 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:High-speed CAN/LIN fail-safe system basis chip
UJA1065TW/3V0 功能描述:網(wǎng)絡(luò)控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
UJA1065TW/3V0,512 功能描述:CAN 接口集成電路 HI SPEED CAN SYSTEM RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube
UJA1065TW/3V0,518 功能描述:網(wǎng)絡(luò)控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
UJA1065TW/3V0512 制造商:NXP Semiconductors 功能描述:CONTROLLER SYS CAN/LIN 3V 32HTSSOP
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