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參數(shù)資料
| 型號： | TSB42AB4I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| 中文描述： | 1394消費(fèi)電子產(chǎn)品鏈路層控制器 |
| 文件頁數(shù)： | 105/183頁 |
| 文件大?。?/td> | 798K |
| 代理商： | TSB42AB4I |
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68
0x00C GPIOCFG – GPIO Configuration (Continued)
BIT
NAME
TYPE
RESET
FUNCTION
14
GPIO4IN
RU
0
GPIO4 input – The current value of the associated GPIO pin is reflected
in this register.
13
GPIO4OUT
RW
0
GPIO4 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
12
GPIO4STAT
RCU
0
GPIO4 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
11
GPIO3IN
RU
0
GPIO3 input – The current value of the associated GPIO pin is reflected
in this register.
10
GPIO3OUT
RW
0
GPIO3 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
9
GPIO3STAT
RCU
0
GPIO3 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
8
GPIO2IN
RU
0
GPIO2 input – The current value of the associated GPIO pin is reflected
in this register.
7
GPIO2OUT
RW
0
GPIO2 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
6
GPIO2STAT
RCU
0
GPIO2 status This bit is set by hardware when a level shift is detected
on the associated GP10 pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
5
GPIO1IN
RU
0
GPIO1 input – The current value of the associated GPIO pin is reflected
in this register.
4
GPIO1OUT
RW
0
GPIO1 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
3
GPIO1STAT
RCU
0
GPIO1 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
2
GPIO0IN
RU
0
GPIO0 input – The current value of the associated GPIO pin is reflected
in this register.
1
GPIO0OUT
RW
0
GPIO0 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
0
GPIO0STAT
RCU
0
GPIO0 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GP10 pin.
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PDF描述 |
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| TSB42AB4PGE | IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
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| TSB81BA3I | IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSB42AB4IPDT | 功能描述:1394 接口集成電路 1394 Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB42AB4PDT | 功能描述:1394 接口集成電路 1394 Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB42AB4PDTG4 | 功能描述:1394 接口集成電路 Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB42AB4PGE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| TSB42AC3 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:General purpose link layer ideal for a wide-range of applications |
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