![](http://datasheet.mmic.net.cn/390000/TSB42AA4I_datasheet_16839080/TSB42AA4I_147.png)
650
0x158 DBEINTEN – Data Buffer Interrupt 1 Enables (Continued)
BIT
NAME
TYPE
RESET
FUNCTION
23
BUF6CELLCFRM
RW
0
Buffer 6 cell confirm When this bit is set to 1, the SYSINT.DBINT3 bit
is set to 1 when the corresponding bit in the DBINT1 register is set by
hardware. When set to 0, the corresponding bit in the DBINT1 register
has no effect on the SYSINT.DBINT3 bit.
22
BUF6TSREL
RW
0
Buffer 6 time stamp release When this bit is set to 1, the
SYSINT.DBINT3 bit is set to 1 when the corresponding bit in the
DBINT1 register is set by hardware. When set to 0, the corresponding
bit in the DBINT1 register has no effect on the SYSINT.DBINT3 bit.
21
BUF6AGED
RW
0
Buffer 6 time stamp expired When this bit is set to 1, the
SYSINT.DBINT3 bit is set to 1 when the corresponding bit in the
DBINT1 register is set by hardware. When set to 0, the corresponding
bit in the DBInt1 register has no effect on the SYSINT.DBINT3 bit.
20
BUF6WM1
RW
0
Buffer 6 water mark 1 When this bit is set to 1, the SYSINT.DBINT3
bit is set to 1 when the corresponding bit in the DBINT1 register is set
by hardware. When set to 0, the corresponding bit in the DBINT1
register has no effect on the SYSINT.DBINT3 bit.
19
BUF6WM0
RW
0
Buffer 6 water mark 0 When this bit is set to 1, the SYSINT.DBINT3
bit is set to 1 when the corresponding bit in the DBINT1 register is set
by hardware. When set to 0, the corresponding bit in the DBINT1
register has no effect on the SYSINT.DBINT3 bit.
18
RSVD
R0
0
Reserved – A write to this location has no effect. A read returns 0.
17
BUF6FULL
RW
0
Buffer 6 full When this bit is set to 1, the SYSINT.DBINT3 bit is set to 1
when the corresponding bit in the DBINT1 register is set by hardware.
When set to 0, the corresponding bit in the DBINT1 register has no
effect on the SYSINT.DBINT3 bit.
16
BUF6EMPTY
RW
0
Buffer 6 empty When this bit is set to 1, the SYSINT.DBINT3 bit is set
to 1 when the corresponding bit in the DBINT1 register is set by
hardware. When set to 0, the corresponding bit in the DBINT1 register
has no effect on the SYSINT.DBINT3 bit.
15
BUF5CELLCFRM
RW
0
Buffer 5 cell confirm When this bit is set to 1, the SYSINT.DBINT2 bit
is set to 1 when the corresponding bit in the DBINT1 register is set by
hardware. When set to 0, the corresponding bit in the DBINT1 register
has no effect on the SYSINT.DBINT2 bit.
14
BUF5TSREL
RW
0
Buffer 5 time stamp release When this bit is set to 1, the
SYSINT.DBINT2 bit is set to 1 when the corresponding bit in the
DBINT1 register is set by hardware. When set to 0, the corresponding
bit in the DBINT1 register has no effect on the SYSINT.DBINT2 bit.
13
BUF5AGED
RW
0
Buffer 5 time stamp expired When this bit is set to 1, the
SYSINT.DBINT2 bit is set to 1 when the corresponding bit in the
DBINT1 register is set by hardware. When set to 0, the corresponding
bit in the DBINT1 register has no effect on the SYSINT.DBINT2 bit.