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參數(shù)資料
| 型號： | TSB42AA9IPZT |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | STORAGELYNX 1394 LINK-LAYER CONTROLLER FOR ATA/ATAPI STORAGE PRODUCTS |
| 中文描述： | STORAGELYNX 1394鏈路層的ATA控制器/ ATAPI儲存產(chǎn)品 |
| 文件頁數(shù)： | 107/183頁 |
| 文件大小： | 798K |
| 代理商： | TSB42AA9IPZT |
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610
0x014 SYSINT – System Interrupts and Interrupt Enables
BIT
NAME
TYPE
RESET
FUNCTION
31
GPIOINTEN1
RW
0
GPIO interrupt 1 enable – When this bit is set to 1, an interrupt is
generated if hardware sets SYSINT.GPIOINT1. When this bit is set to 0,
SYSINT.GPIOINT1 is not an interrupt source.
30
GPIOINTEN0
RW
0
GPIO interrupt 0 enable – When this bit is set to 1, an interrupt is
generated if hardware sets SYSINT.GPIOINT0. When this bit is set to 0,
SYSINT.GPIOINT0 is not an interrupt source.
29
RSVD
R0
0
Reserved – A write to this location has no effect. A read returns 0.
28
MCIFINTEN
RW
1
Microcontroller interface interrupt enable – When this bit is set to 1, an
interrupt is generated if hardware sets SYSINT.MCIFINT. When this bit
is set to 0, SYSINT.MCIFINT is not an interrupt source.
27
RXDPINTEN1
RW
0
Receive data path interrupt 1 enable When this bit is set to 1, an
interrupt is generated if hardware sets SYSINT.RXDPINT1. When this
bit is set to 0, SYSINT.RXDPINT1 is not an interrupt source.
26
RXDPINTEN0
RW
0
Receive data path interrupt 0 enable When this bit is set to 1, an
interrupt is generated if hardware sets SYSINT.RXDPINT0. When this
bit is set to 0, SYSINT.RXDPINT0 is not an interrupt source.
25
TXDPINTEN1
RW
0
Transmit data path interrupt 1 enable When this bit is set to 1, an
interrupt is generated if hardware sets SYSINT.TXDPINT1. When this
bit is set to 0, SYSINT.TXDPINT1 is not an interrupt source.
24
TXDPINTEN0
RW
0
Transmit data path interrupt 0 enable When this bit is set to 1, an
interrupt is generated if hardware sets SYSINT.TXDPINT0. When this
bit is set to 0, SYSINT.TXDPINT0 is not an interrupt source.
23
DBINTEN3
RW
0
DB interrupt 3 enable When this bit is set to 1, an interrupt is generated
if hardware sets SYSINT.DBINT3. When this bit is set to 0,
SYSINT.BINT3 is not an interrupt source.
22
DBINTEN2
RW
0
DB interrupt 2 enable When this bit is set to 1, an interrupt is generated
if hardware sets SYSINT.DBINT2. When this bit is set to 0,
SYSINT.DBINT2 is not an interrupt source.
21
DBINTEN1
RW
0
DB interrupt 1 enable When this bit is set to 1, an interrupt is generated
if hardware sets SYSINT.DBINT1. When this bit is set to 0,
SYSINT.DBINT1 is not an interrupt source.
20
DBINTEN0
RW
0
DB interrupt 0 enable When this bit is set to 1, an interrupt is generated
if hardware sets SYSINT.DBINT0. When this bit is set to 0,
SYSINT.DBINT0 is not an interrupt source.
19
HSDIBINTEN
RW
0
HSDIB interrupt enable When this bit is set to 1, an interrupt is
generated if hardware sets SYSINT.HSDIBINT. When this bit is set to 0,
SYSINT.HSDIBINT is not an interrupt source.
18
HSDIAINTEN
RW
0
HSDIA interrupt enable When this bit is set to 1, an interrupt is
generated if hardware sets SYSINT.HSDIAINT. When this bit is set to 0,
SYSINT.HSDIAINT is not an interrupt source.
17
LLCINTEN1
RW
0
Link interrupt 1 enable When this bit is set to 1, an interrupt is
generated if hardware sets SYSINT.LLCINT1. When this bit is set to 0,
SYSINT.LLCINT1 is not an interrupt source.
16
LLCINTEN0
RW
0
Link interrupt 0 enable When this bit is set to 1, an interrupt is
generated if hardware sets SYSINT.LLCINT0. When this bit is set to 0,
SYSINT.LLCINT0 is not an interrupt source.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TSB42AA9PZT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TSB42AA9PZTR | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| TSB42AB4 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| TSB42AB4I | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| TSB42AB4IPDT | 功能描述:1394 接口集成電路 1394 Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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