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662
0x24C TXDPINTEN – Transmit Data Path interrupt enable (Continued)
BIT
NAME
TYPE
RESET
FUNCTION
19
ERRDBC0
RW
0
ERRDBC0 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT1 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT1 bit.
18
ERRDBC1
RW
0
ERRDBC1 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT1 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT1 bit.
17
ERRDBC2
RW
0
ERRDBC2 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT1 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT1 bit.
16
ERRDBC3
RW
0
ERRDBC3 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT1 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT1 bit.
15
ERRTH0_0
RW
0
ERRTH0_0 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.
14
ERRTH0_1
RW
0
ERRTH0_1 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.
13
ERRTH0_2
RW
0
ERRTH0_2 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.
12
ERRTH0_3
RW
0
ERRTH0_3 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.
11
ERRBFLSH4
RW
0
ERRBFLSH4 interrupt enable – When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.
10
ERRBFLSH5
RW
0
ERRBFLSH5 interrupt enable – When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.
9
ERRBFLSH6
RW
0
ERRBFLSH6 interrupt enable – When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.
8
ERRBFLSH7
RW
0
ERRBFLSH7 interrupt enable – When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.
7
ERRDBC4
RW
0
ERRDBC4 interrupt enable When this bit is set to 1, the
SYSINT.TXDPINT0 bit is set to 1 when the corresponding bit in the
TXDPINT register is set by hardware. When set to 0, the corresponding bit
in the TXDPINT register has no effect on the SYSINT.TXDPINT0 bit.