![](http://datasheet.mmic.net.cn/390000/TSB42AA4I_datasheet_16839080/TSB42AA4I_104.png)
67
0x00C GPIOCFG – GPIO Configuration
BIT
NAME
TYPE
RESET
FUNCTION
31
RSVD
R0
0
Reserved – A write to this location has no effect. A read returns 0.
30
GPIO9IN
RU
0
GPIO9 input – The current value of the associated GPIO pin is reflected
in this register.
29
GPIO9OUT
RW
0
GPIO9 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
28
GPIO9STAT
RCU
0
GPIO9 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
27
GPIO8IN
RU
0
GPIO8 input – The current value of the associated GPIO pin is reflected
in this register.
26
GPIO8OUT
RW
0
GPIO8 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
25
GPIO8STAT
RCU
0
GPIO8 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
24
GPIO7IN
RU
0
GPIO7 input – The current value of the associated GPIO pin is reflected
in this register.
23
GPIO7OUT
RW
0
GPIO7 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
22
GPIO7STAT
RCU
0
GPIO7 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
21
GPIO6IN
RU
0
GPIO6 input – The current value of the associated GPIO pin is reflected
in this register.
20
GPIO6OUT
RW
0
GPIO6 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
19
GPIO6STAT
RCU
0
GPIO6 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
18
GPIO5IN
RU
0
GPIO5 input – The current value of the associated GPIO pin is reflected
in this register.
17
GPIO5OUT
RW
0
GPIO5 output – When the associated GPIO is configured as a
general-purpose output, the value written to this bit location is driven on
the associated GPIO terminal.
16
GPIO5STAT
RCU
0
GPIO5 status This bit is set by hardware when a level shift is detected
on the associated GPIO pin. The SYSINT.GPIOINT[N] interrupt is also
set, when enabled. Writing a 1
to this location clears the bit, until the
next change is detected on the GPIO pin.
15
RSVD
R0
0
Reserved – A write to this location has no effect. A read returns 0.