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660
0x248 TXDPINT – Transmit Data Path Interrupts (Continued)
BIT
NAME
TYPE
RESET
FUNCTION
22
ERRBFLSH1
RCU
0
Buffer 1 flushed due to an error When this bit is set to 1 by hardware, the
TXDP has flushed the transmit buffer due to an error. This only occurs
when TXDP(N)CFG.BUFFLSHEN is set to 1.
21
ERRBFLSH2
RCU
0
Buffer 2 flushed due to an error When this bit is set to 1 by hardware, the
TXDP has flushed the transmit buffer due to an error. This only occurs
when TXDP(N)CFG.BUFFLSHEN is set to 1.
20
ERRBFLSH3
RCU
0
Buffer 3 flushed due to an error When this bit is set to 1 by hardware, the
TXDP has flushed the transmit buffer due to an error. This only occurs
when TXDP(N)CFG.BUFFLSHEN is set to 1.
19
ERRDBC0
RCU
0
Buffer 0 DBC error When this bit is set to 1 by hardware, the TXDP has
detected a data block continuity error in an MPEG/DV packet.
18
ERRDBC1
RCU
0
Buffer 1 DBC error When this bit is set to 1 by hardware, the TXDP has
detected a data block continuity error in an MPEG/DV packet.
17
ERRDBC2
RCU
0
Buffer 2 DBC error When this bit is set to 1 by hardware, the TXDP has
detected a data block continuity error in an MPEG/DV packet.
16
ERRDBC3
RCU
0
Buffer 3 DBC error When this bit is set to 1 by hardware, the TXDP has
detected a data block continuity error in an MPEG/DV packet.
15
ERRTH0_0
RCU
0
Buffer 0 transmit header error When this bit is set to 1 by hardware, the
TXDP has detected an error in the transmit packet header.
14
ERRTH0_1
RCU
0
Buffer 1 transmit header error When this bit is set to 1 by hardware, the
TXDP has detected an error in the transmit packet header.
13
ERRTH0_2
RCU
0
Buffer 2 transmit header error When this bit is set to 1 by hardware, the
TXDP has detected an error in the transmit packet header.
12
ERRTH0_3
RCU
0
Buffer 3 transmit header error When this bit is set to 1 by hardware, the
TXDP has detected an error in the transmit packet header.
11
ERRBFLSH4
RCU
0
Buffer 4 flushed due to an error When this bit is set to 1 by hardware, the
TXDP has flushed the transmit buffer due to an error. This only occurs
when TXDP(N)CFG.BUFFLSHEN is set to 1.
10
ERRBFLSH5
RCU
0
Buffer 5 flushed due to an error When this bit is set to 1 by hardware, the
TXDP has flushed the transmit buffer due to an error. This only occurs
when TXDP(N)CFG.BUFFLSHEN is set to 1.
9
ERRBFLSH6
RCU
0
Buffer 6 flushed due to an error When this bit is set to 1 by hardware, the
TXDP has flushed the transmit buffer due to an error. This only occurs
when TXDP(N)CFG.BUFFLSHEN is set to 1.
8
ERRBFLSH7
RCU
0
Buffer 7 flushed due to an error When this bit is set to 1 by hardware, the
TXDP has flushed the transmit buffer due to an error. This only occurs
when TXDP(N)CFG.BUFFLSHEN is set to 1.
7
ERRDBC4
RCU
0
Buffer 4 DBC error When this bit is set to 1 by hardware, the TXDP has
detected a data block continuity error in an MPEG/DV packet.
6
ERRDBC5
RCU
0
Buffer 5 DBC error When this bit is set to 1 by hardware, the TXDP has
detected a data block continuity error in an MPEG/DV packet.