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參數(shù)資料
| 型號： | TNET3001 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SONET STS-1 Overhead Terminator(SONET STS-1附加終端) |
| 中文描述： | SONET的STS - 1的開銷終結(jié)者（SONET的STS - 1的附加終端） |
| 文件頁數(shù)： | 24/49頁 |
| 文件大?。?/td> | 1090K |
| 代理商： | TNET3001 |
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TNETS3001
SONET STS-1 OVERHEAD TERMINATOR
SDNS007B – OCTOBER 1993 – REVISED JUNE 1995
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
All address locations are given in hex (h). The relationship between a transmission byte (for example, C1) and
TNETS3001 individual bit locations is shown below:
Individual-Bit Transmission Order (for transmission bytes)
7
6
5
4
3
2
1
0
1st
2nd
3rd
4th
5th
6th
7th
8th
MSB
LSB
TNETS3001 Individual Bit-Identification
TNETS3001 register-bit map
Read/write (R/W); Read only (R)
SR = Status Register; CR = Control Register
ADDRESS
MODE
0F1
BIT 7
R/W
BIT 6
BIT 5
RPAIS
BIT 4
BIT 3
BIT 2
BIT 1
COMMENT
SR0
0F0
R/W
RLOC
RNPTR
RLAIS
RLOP
RLOF
ROOF
SR0
Same as 0F0 except does not reset on read; write ones to reset individual bits
0F5
R
Same as 0F2 except unlatched values
0F4
R
Same as 0F0 except unlatched values
SR0
SR1
TNPTR
TPAIS
TLOF
–VE
R/W
PARA
SR2
1F0
0FA
R/W
STS1
HINT
TLOP
ALTOW
TIEN
PIEN
TLOS
CR2
TLOC
TLAIS
TOOF
R/W
TRF1
TRC1
TRZ1
TRZ2
1F9
1F8
R/W
TRSD
TRLD
TRE2
TRAIS
PTE
TPATH
TRAPS
RXRTM
EXAPS
RRB2
CR4
CR3
P
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