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| 型號： | TMS470R1B768PGEQR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 25/49頁 |
| 文件大?。?/td> | 552K |
| 代理商： | TMS470R1B768PGEQR |
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RST AND PORRST TIMINGS
Timing Requirements for PORRST
VCCP /VCCIO
VCC
VCCPORH
VCCIOPORL
VIL(PORRST)
VCCIOPORH
VCCIOPORL
VCCPORL
VCC
PORRST
VCCIO
VCCPORH
VCCPORL
VIL
VIL(PORRST)
VCCP/VCCIO
VCC
th(PORRST)rio
th(PORRST)r
tsu(PORRST)f
th(PORRST)r
tsu(PORRST)fio
tsu(PORRST)f
tsu(VCCIO)f
tsu(VCCIO)r
tsu(PORRST)r
th(PORRST)d
Switching Characteristics over Recommended Operating Conditions for RST
(1)
www.ti.com ......................................................................................................................................................... SPNS108B – AUGUST 2005 – REVISED MAY 2008
(see Figure 8)
MIN
MAX UNIT
VCCPORL
VCC low supply level when PORRST must be active during power up
0.6
V
VCC high supply level when PORRST must remain active during power up and become
VCCPORH
1.5
V
active during power down
VCCIOPORL
VCCIO low supply level when PORRST must be active during power up
1.1
V
VCCIO high supply level when PORRST must remain active during power up and become
VCCIOPORH
2.75
V
active during power down
VIL
Low-level input voltage after VCCIO > VCCIOPORH
0.2 VCCIO
V
VIL(PORRST)
Low-level input voltage of PORRST before VCCIO > VCCIOPORL
0.5
V
tsu(PORRST)r
Setup time, PORRST active before VCCIO > VCCIOPORL during power up
0
ms
tsu(VCCIO)r
Setup time, VCCIO > VCCIOPORL before VCC > VCCPORL
0
ms
th(PORRST)r
Hold time, PORRST active after VCC > VCCPORH
1
ms
tsu(PORRST)f
Setup time, PORRST active before VCC ≤ VCCPORH during power down
8
s
th(PORRST)rio
Hold time, PORRST active after VCC VCCIOPORH
1
ms
th(PORRST)d
Hold time, PORRST active after VCC < VCCPORL
0
ms
tsu(PORRST)fio
Setup time, PORRST active before VCC ≤ VCCIOPORH during power down
0
ns
tsu(VCCIO)f
Setup time, VCC < VCCPORL before VCCIO < VCCIOPORL
0
ns
NOTE: VCCIO > 1.1 V before VCC > 0.6 V
Figure 8. PORRST Timing Diagram
PARAMETER
MIN
MAX UNIT
Valid time, RST active after PORRST inactive
4112tc(OSC)
tv(RST)
ns
Valid time, RST active (all others)
8tc(SYS)
(1)
Specified values do NOT include rise/fall times. For rise and fall timings, see the "Switching Characteristics for Output Timings versus
Load Capacitance" table.
Copyright 2005–2008, Texas Instruments Incorporated
31
Product Folder Link(s): TMS470R1B768
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