參數(shù)資料
型號： TMS320UVC5409
元件分類： 數(shù)字信號處理
英文描述： 16-Bit Digital Signal Processor
中文描述： 16位數(shù)字信號處理器
文件頁數(shù)： 11/60頁
文件大小： 772K
代理商： TMS320UVC5409
TMS320UVC5402
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS100A – APRIL 1999 – REVISED AUGUST 1999
11
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
extended program memory
The ’UVC5402 uses a paged extended memory scheme in program space to allow access of up to 1024K
program memory locations.
Twenty address lines, instead of sixteen
An extra memory-mapped register, the XPC register, defines the page selection. This register is
memory-mapped into data space to address 001Eh. At a hardware reset, the XPC is initialized to 0.
Six extra instructions for addressing extended program space. These six instructions affect the XPC.
–
FB[D]pmad (20 bits) – Far branch
–
FBACC[D] Accu[19:0] – Far branch to the location specified by the value in accumulator A or
accumulator B
–
FCALL[D]pmad (20 bits) – Far call
–
FCALA[D] Accu[19:0] – Far call to the location specified by the value in accumulator A or accumulator B
–
FRET[D]– Far return
–
FRETE[D]– Far return with interrupts enabled
In addition to these new instructions, two ’54x instructions are extended to use 20 bits in the ’UVC5402:
–
READA data_memory (using 20-bit accumulator address)
–
WRITA data_memory (using 20-bit accumulator address)
All other instructions, software interrupts, and hardware interrupts do not modify the XPC register and access
only memory within the current page.
Program memory in the ’UVC5402 is organized into 16 pages that are each 64K in length, as shown in Figure 2.
0 0000
1 0000
1 3FFF
Page 1
Lower
16K
External
2 0000
2 3FFF
Page 2
Lower
16K
External
. . .
. . .
F 0000
F 3FFF
Page 15
Lower
16K
External
0 FFFF
Page 0
64K
Words
1 4000
1 FFFF
Page 1
Upper
48K
External
2 4000
2 FFFF
Page 2
Upper
48K
External
. . .
. . .
F 4000
F FFFF
Page 15
Upper
48K
External
See Figure 1
The lower 16K words of pages 1 through 15 are available only when the OVLY bit is cleared to 0. If the OVLY bit is set to 1, the on-chip RAM
is mapped to the lower 16K words of all program space pages.
Figure 2. Extended Program Memory
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