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參數(shù)資料
| 型號： | TMS320LC57S |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Digital Signal Processors(35/50ns指令周期，并行邏輯單元，可編程PLL，全雙工同步串行口的DSP) |
| 中文描述： | 數(shù)字信號處理器（35/50ns指令周期，并行邏輯單元，可編程鎖相環(huán)，全雙工同步串行口的數(shù)字信號處理器） |
| 文件頁數(shù)： | 35/87頁 |
| 文件大?。?/td> | 1864K |
| 代理商： | TMS320LC57S |
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TMS320C5x, TMS320LC5x
DIGITAL SIGNAL PROCESSORS
SPRS030A – APRIL 1995 – REVISED APRIL 1996
35
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
addressing modes (continued)
In immediate addressing, the actual operand data is provided in a portion of the instruction word or words. There
are two types of immediate addressing: long and short. In short-immediate addressing, the data is contained
in a portion of the bits in a single-word instruction. In long-immediate addressing, the data is contained in the
second word of a two-word instruction. The immediate-addressing mode is useful for data that does not need
to be stored or used more than once during the course of program execution, such as initialization values,
constants, etc.
The register-addressing mode uses operands in CPU registers either explicitly, such as with a direct reference
to a specific register, or implicitly, with instructions that intrinsically reference certain registers. In either case,
operand reference is simplified because 16-bit values can be used without specifying a full 16-bit operand
address or immediate value.
Memory-mapped addressing provides the convenience of easy access to memory-mapped registers located
on page zero of data memory. The flexibility of memory-mapped addressing results because accesses are
made independently of actual DP value and without having to provide a complete address of the memory
location being accessed. Commonly used on-board registers can be accessed with a simplified addressing
scheme.
Circular addressing is the most sophisticated ’C5x addressing mode. This addressing mode allows specified
buffers in memory to be accessed sequentially with a pointer that automatically wraps around to the beginning
of the buffer when the last location is accessed. A total of two independent circular buffers can be allocated at
any given time.
Five dedicated registers are allocated for implementation of circular addressing: a beginning-of-buffer and an
end-of-buffer register for each of the two independent circular buffers and a control register. Additionally, one
of the auxiliary registers is used as the pointer into the circular buffer. All registers used in circular addressing
must be initialized properly prior to performing any circular buffer access.
The circular-addressing mode allows implementation of circular buffers, which facilitate data structures used
in FIR filters, convolution and correlation algorithms, and waveform generators. Having the capability to access
circular buffers automatically with no overhead allows these types of data structures to be implemented most
efficiently.
repeat feature
The repeat function can be used with instructions such as multiply/accumulates (MAC and MACD), block moves
(BLDD and BLPD), I/O transfers (IN/OUT), and table read/writes (TBLR/TBLW). These instructions, although
normally multicycle, are pipelined when the repeat feature is used, and they effectively become single-cycle
instructions. For example, the table-read instruction may take three or more cycles to execute, but when the
instruction is repeated, a table location can be read every cycle.
The repeat counter (RPTC) is a 16-bit register that, when loaded with a number N, causes the next single
instruction to be executed N + 1 times. The RPTC register is loaded by either the RPT or the RPTZ instruction,
resulting in a maximum of 65,536 executions of a given instruction. RPTC is cleared by reset. The RPTZ
instruction clears both ACC and PREG before the next instruction starts repeating. Once a repeat instruction
(RPT or RPTZ) is decoded, all interrupts including NMI (except reset) are masked until the completion of the
repeat loop. However, the device responds to the HOLD signal while executing an RPT/RPTZ loop.
repeat feature
(continued)
The ’C5x implements a block-repeat feature that provides zero-overhead looping for implementation of FOR
and DO loops. The function is controlled by three registers (PASR, PAER, and BRCR) and the BRAF bit in the
PMST register. The block-repeat counter register (BRCR) is loaded with a loop count of 0 to 65,535. Then,
execution of the RPTB (repeat block) instruction loads the program-address-start register (PASR) with the
address of the instruction following the RPTB instruction and loads the program-address-end register (PAER)
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| TMS320LF2401AVFA | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320LF2401AVFS | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16-Bit Fixed-Pt DSP with Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320LF2402APGA | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16-Bit Fixed-Pt DSP with Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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| TMS320LF2402APGS | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16-Bit Fixed-Pt DSP with Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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