參數(shù)資料
型號(hào)： TMP90CM38
廠商： Toshiba Corporation
元件分類： 通用總線功能
英文描述： High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM，ROM，General Serial Interface,Multifuction Timer/Event Counter，Signal Selector Circuit,PWM Output(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位A/D，D/A轉(zhuǎn)換器,ROM，RAM，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器,信號(hào)選擇電路，PWM輸出）)
中文描述： 采用先進(jìn)的CMOS高速8位微控制器，集成8位A / D，D / A轉(zhuǎn)換，內(nèi)存，光盤，通用串行接口，Multifuction定時(shí)器/事件計(jì)數(shù)器，信號(hào)選擇器電路，PWM輸出（高速，先進(jìn)的的CMOS 8位微控制器（芯片集成了8位A / D轉(zhuǎn)換，數(shù)/模轉(zhuǎn)換器，ROM和RAM內(nèi)存，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器，信號(hào)選擇電路，脈寬調(diào)制輸出））
文件頁數(shù)： 96/172頁
文件大小： 5946K
代理商： TMP90CM38
96
TOSHIBA CORPORATION
TMP90CM38
(3)
16-bit Programmable Pulse Generation (PPG) Mode
The PPG mode is entered by inversion of the timer flip-
flop TFF4 that is to be enabled bu the match of the up-
counter UC16 with the timer register TREG4 or 5 and
to be output to TO4 (also used as P51). In this mode,
the following conditions must be satisfied.
When the double buffer of TREG4 is enabled in this
mode, the value of register buffer 4 will be shifted in
TREG4 at match with TREG5. This feature makes
easy the handling of low duty waves (when duty rate is
varied).
(4)
Application examples of capture function
The loading of up-counter (UC16) vaules into the cap-
ture registers CAP1 and CAP2, the timer flip-flop TFF4
inversion due to the match detection by comparators
CP4 and CP5, and the output of the TFF4 status to
TO4 pin can be enabled or disabled. Combined with
interrupt function, they can be applied in many ways,
for example.
One-shot pulse output by using external trigger
pulse
Frequency measurement
Pulse width measurement
Time difference measurement
One-shot pulse output from the rising edge of exter-
nal trigger pulse.
Set the up-counter UC16 in free-running mode with the
internal input clock, input the external trigger pulse
from TI4 pin, and load the value of up-counter into cap-
ture register CAP1 at the rise edge of the TI4 pin. Then
set to T4MOD <CAPM1,0> = 01.
When the interrupt INT1 is generated at the rise edge
of TI4 pin, set the CAP1 value (c) plus a delay time (d)
to TREG4 (= c + d), and set the above set value (c + d)
plus a one-shot pulse width (p) to TREG5 (= c + + d +
p). When the interrupt INT1 occurs the T4FFCR regis-
ter should be set that the TFF4 inversion is enabled
only when the up-counter value matches TREG4 or 5.
When interrupt INTT5 occurs, this inversion will be dis-
abled.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP90CM38F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90CM38T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90CM39F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90CM39T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90CM40 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
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