參數(shù)資料
型號： TMP90CM38
廠商： Toshiba Corporation
元件分類： 通用總線功能
英文描述： High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM，ROM，General Serial Interface,Multifuction Timer/Event Counter，Signal Selector Circuit,PWM Output(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位A/D，D/A轉(zhuǎn)換器,ROM，RAM，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器,信號選擇電路，PWM輸出）)
中文描述： 采用先進(jìn)的CMOS高速8位微控制器，集成8位A / D，D / A轉(zhuǎn)換，內(nèi)存，光盤，通用串行接口，Multifuction定時(shí)器/事件計(jì)數(shù)器，信號選擇器電路，PWM輸出（高速，先進(jìn)的的CMOS 8位微控制器（芯片集成了8位A / D轉(zhuǎn)換，數(shù)/模轉(zhuǎn)換器，ROM和RAM內(nèi)存，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器，信號選擇電路，脈寬調(diào)制輸出））
文件頁數(shù)： 12/172頁
文件大?。?/td> 5946K
代理商： TMP90CM38
12
TOSHIBA CORPORATION
TMP90CM38
3.3.1 General-Purpose Interrupt Processing
Figure 3.3 (2) shows the general-purpose interrupt processing
flow.
The CPU first saves the contents of the program counter
PC and register AF (including the interrupt enable/disable flag
IFF immediately before an interrupt) to the stack and then
resets the interrupt enable/disable flag IFF to “0” (interrupt
disable). Finally, the interrupt vector contents [V] are transferred to
the program counter and a jump is made to the interrupt
processing program.
There is a 20-state overhead from the time when the interrupt is
received until the jump is made to the interrupt processing program.
Figure 3.3 (2). General-Purpose Interrupt Processing Flow
Interrupt processing program is ended with the RETI
instruction for both maskable and non-maskable interrupts.
Executing this instruction restores the program counter
PC and register AF contents from the stack. (Resets the interrupt
enable/disable flag immediately before an interrupt.)
When the CPU reads the interrupt vector, the interrupt
request source confirms that the interrupt has been received
and then clears the interrupt request. Non-maskable interrupts
cannot be disabled by program. Maskable interrupts, how-
ever, can be enabled and disabled by program. Bit 5 of CPU reg-
ister F is an interrupt enable/disable flipflop (IFF). Interrupts are
enabled by setting this bit to “1” with the EI (interrupt enable)
instruction and disabled by resetting this bit to “0” with the DI
(interrupt disable) instruction. IFF is reset to “0” by resetting
and when an interrupt is received (including non-maskable
interrupts).
The EI instruction is actually executed after the next
instruction is executed.
Table 3.3 (1) shows the interrupt sources.
相關(guān)PDF資料
PDF描述
TMP90CM40 High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CUP,A/D Converter,RAM，ROM，General Serial Interface,Multifuction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,A/D，轉(zhuǎn)換器,ROM，RAM，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器）)
TMP90P800 A System Evaluation LSI With One-Time PROM(8192 x 8-Bit),RAM(256 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路（帶一次可編程ROM(8192 x 8位),RAM(256 x 8位))
TMP90P802 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(8192 x 8-Bit),RAM(256 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(8192 x 8位),RAM(256 x 8位))
TMP90PH02 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(16384 x 8位),RAM(512 x 8位))
TMP90PH44 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(16384 x 8位),RAM(512 x 8位))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP90CM38F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90CM38T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90CM39F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90CM39T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90CM40 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
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