參數(shù)資料
型號(hào)： TMP90CM38
廠商： Toshiba Corporation
元件分類： 通用總線功能
英文描述： High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM，ROM，General Serial Interface,Multifuction Timer/Event Counter，Signal Selector Circuit,PWM Output(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位A/D，D/A轉(zhuǎn)換器,ROM，RAM，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器,信號(hào)選擇電路，PWM輸出）)
中文描述： 采用先進(jìn)的CMOS高速8位微控制器，集成8位A / D，D / A轉(zhuǎn)換，內(nèi)存，光盤，通用串行接口，Multifuction定時(shí)器/事件計(jì)數(shù)器，信號(hào)選擇器電路，PWM輸出（高速，先進(jìn)的的CMOS 8位微控制器（芯片集成了8位A / D轉(zhuǎn)換，數(shù)/模轉(zhuǎn)換器，ROM和RAM內(nèi)存，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器，信號(hào)選擇電路，脈寬調(diào)制輸出））
文件頁數(shù)： 146/172頁
文件大小： 5946K
代理商： TMP90CM38
146
TOSHIBA CORPORATION
TMP90CM38
3.10. 2 Operation
(1)
Analog Reference Voltage
High analog reference voltage is applied to the AVCC
pin, and the low analog voltage is applied to AVSS pin.
The reference voltage between AVCC and AVSS is
divided by 256 using ladder resistance, and compared
with the analog input voltage for A/D conversion.
(2)
Analog Input Channels
Analog input channel is selected by ADMOD
<ADCH1,0>, ADMOD <ADCH2>. However, which
channel to select depends on the operation mode of
the A/D converter.
In fixed analog input mode, one channel is selected by
ADMOD <ADCH1,0>, ADMOD <ADCH2> among
three pins: AN0 to AN3.
In analog input channel scan mode, the number of
channels to be scanned from AN0 is specified by
ADMOD <ADCH1,0>, ADMOD <ADCH2>, such as
AN0
é
AN1, AN0
é
AN1
é
AN2
é
AN3 or the number of channels to be scanned
from AN4 is such as AN4
é
AN4
é
AN5
é
AN6
é
AN7.
When reset, A/D conversion channel register will be
initialized to ADMOD <ADCH1,0> = 00, ADCH
<ADCH2> = 0 so that AN0 pin will be selected.
The pins which are not used as analog input channel
can be used as ordinary input port P5.
AN2, and AN0
é
AN1
é
AN5, AN4
é
AN5
é
AN6,
(3)
Starting A/D Conversion
A/D conversion starts when A/D conversion register
ADMOD <ADS> is written “1”. When A/D conversion
starts, A/D conversion busy flag ADMOD <ADBF>
which indicates “A/D conversion is in progress” will be
set to “1”.
(4)
A/D Conversion Mode
Both fixed A/D conversion channel mode and A/D
conversion channel scan mode have two conversion
modes, i.e., single and repeat conversion modes.
In fixed channel repeat mode, conversion of specified
one channel is executed repeatedly.
In scan repeat mode, scanning from AN0
from AN4,
é
AN7 is executed repeatedly.
A/D conversion mode is selected by ADMOD <REPET,
SCAN>.
é
AN3 or
(5)
A/D Conversion Speed Selection
There are two A/D conversion speed modes: high
speed mode and low speed mode. The selection is
executed by ADMOD <ADCS> register.
When reset, ADMOD <ADCS> will be initialized to “0”,
so that high speed conversion mode will be selected.
(6)
A/D Conversion End and Interrupt
A/D conversion single mode
ADMOD <EOCF> for A/D conversion end will be set to
“1”, ADMOD <ADBF> flag will be reset to “0”, and
INTAD interrupt will be enabled when A/D conversion
of specified channel ends in fixed conversion channel
mode or when A/D conversion of the last channel
ends in channel scan mode.
Interrupt requesting flip-flop is cleared only by resetting
operation or reading the A/D conversion result storing
register and cannot be cleared by instruction.
A/D conversion repeat mode
For both fixed conversion mode and conversion chan-
nel scan mode, INTAD will be disabled when in repeat
mode. Always leave the INTE0 <ADIS> flag at “0”.
Write “0” to ADMOD <REPET> to end the repeat
mode. Then, the repeat mode will be exited as soon
as the conversion in progress is completed.
(7)
Storing the A/D Conversion Result
The results of A/D conversion are stored ADREG04 to
ADREG37 registers for each channel. In repeat mode,
the registers are updated whenever conversion ends.
ADREG04 to ADREG37 are read-only registers.
(8)
Reading the A/D Conversion Result
The results of A/D conversion are stored ADREG04 to
ADREG37 registers. When the contents of one of
ADREG0 to ADREG3 registers are read, ADMOD
<EOCF> will be cleared to “0”.
Setting example:
When the analog input volt-
age of the AN3 pin pin is A/
D converted and the
results are read in the
memory at FF10H by A/D
interrupt INTAD routine.
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