參數(shù)資料
型號(hào): TMP90CM38
廠商: Toshiba Corporation
元件分類(lèi): 通用總線功能
英文描述: High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM,ROM,General Serial Interface,Multifuction Timer/Event Counter,Signal Selector Circuit,PWM Output(高速、先進(jìn)的 CMOS 8位微控制器(芯片集成了8位A/D,D/A轉(zhuǎn)換器,ROM,RAM,通用串行接口,多功能定時(shí)器/事件計(jì)數(shù)器,信號(hào)選擇電路,PWM輸出))
中文描述: 采用先進(jìn)的CMOS高速8位微控制器,集成8位A / D,D / A轉(zhuǎn)換,內(nèi)存,光盤(pán),通用串行接口,Multifuction定時(shí)器/事件計(jì)數(shù)器,信號(hào)選擇器電路,PWM輸出(高速,先進(jìn)的的CMOS 8位微控制器(芯片集成了8位A / D轉(zhuǎn)換,數(shù)/模轉(zhuǎn)換器,ROM和RAM內(nèi)存,通用串行接口,多功能定時(shí)器/事件計(jì)數(shù)器,信號(hào)選擇電路,脈寬調(diào)制輸出))
文件頁(yè)數(shù): 93/172頁(yè)
文件大?。?/td> 5946K
代理商: TMP90CM38
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TOSHIBA CORPORATION
93
TMP90CM38
Up-counter (UC16)
UC16 is a 16-bit binary counter which counts up
according to the input clock specified by T4MOD
<T4CLK1,0> register.
As the input clock, one of the internal clocks T1 (8/
fc), T4 (32/fc), and TI6 (128/fc) from 9-bit prescaler
(also used as 8-bit timer), and external clock from TI4
pin (commonly used as P46/INT1 pin) can be selected.
When reset, it will be initialized to <T4CLK1,0> = 00 to
select TI4 input mode. Counting, stop, or clearing of
the counter in controlled by timer operation control
register TRUN <T4RUN>.
When clearing is enabled, up-counter UC16 will be
cleared to zero each time it coincides matches the
timer register TREG5. The “clear enable/disable” is set
by T4MOD <CLE>.
If clearing is disabled, the counter operates as a free-
running counter.
Timer registers (TREG4 and TREG5)
These two 16-bit registers are used to set the value of
the counter. When the value of up-counter UC16
matches the set value of this timer register, the com-
parator match detect signal will become active.
Setting data for timer register (TREG4 and TREG5) is
executed using 16-bit transfer instruction od using 8-
bit transfer instruction twice for lower 8 bits and upper
8 bits in order.
TREG4 timer register is of double buffer structure,
which is paired with register buffer. TREG4 controls
whether the double buffer should be enabled or dis-
abled, using the timer register double buffer control
register TRDC <TR4DE>; disable when <TR4DE> = 0,
while enable when <TR4DE> = 1.
When the double buffer is enabled, the timing to trans-
fer data from the register buffer to the timer register is
at the match between the up-counter and TREG5.
When reset, it will be initialized to <TR4DE> = 0,
whereby the double buffer is disabled. To use the dou-
ble buffer, write data in the register buffer.
TREG4 and register buffer 4 are allocated to the same
memory addresses FFCFH and FFD0H. When
<TR4DE> = 1, the value is written into only the register
buffer.
Capture register (CAP1 and CAP2)
These 16-bit registers are used to hold the values of
the up-counter UC16.
Data in the capture registers should be read by a 2-
byte data load instruction or two 1-byte data load
instruction, from the lower 8 bits followed by the upper
8 bits.
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