參數(shù)資料
型號: TMP90CM38
廠商: Toshiba Corporation
元件分類: 通用總線功能
英文描述: High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM,ROM,General Serial Interface,Multifuction Timer/Event Counter,Signal Selector Circuit,PWM Output(高速、先進的 CMOS 8位微控制器(芯片集成了8位A/D,D/A轉(zhuǎn)換器,ROM,RAM,通用串行接口,多功能定時器/事件計數(shù)器,信號選擇電路,PWM輸出))
中文描述: 采用先進的CMOS高速8位微控制器,集成8位A / D,D / A轉(zhuǎn)換,內(nèi)存,光盤,通用串行接口,Multifuction定時器/事件計數(shù)器,信號選擇器電路,PWM輸出(高速,先進的的CMOS 8位微控制器(芯片集成了8位A / D轉(zhuǎn)換,數(shù)/模轉(zhuǎn)換器,ROM和RAM內(nèi)存,通用串行接口,多功能定時器/事件計數(shù)器,信號選擇電路,脈寬調(diào)制輸出))
文件頁數(shù): 32/172頁
文件大?。?/td> 5946K
代理商: TMP90CM38
32
TOSHIBA CORPORATION
TMP90CM38
3.4.3 STOP Mode
Figure 3.4 (4) shows the timing of HALT release caused by
interrupts in STOP mode.
In the STOP mode, all interval circuits stop, including
internal oscillator. When the STOP mode is activated, all pins
except special ones are put in the high-impedance state, iso-
lated from the internal operation of MCU. Table 3.4 (1) shows
the state of each pin in the STOP mode. However, if WDMOD
<DRVE> (drive enable: bit 0 of memory address FFECH) of th
built-in I/O register is set to “1”, the pre-halt state of the pins can
be retained. The register is cleared to “0” by reset operation.
When the CPU accepts an interrupt request, the internal
oscillator first restarts. However, to get the stabilized oscilla-
tion, the system clock starts its output after the time set by
warming up counter has passed. WDMOD <WARM> (warm-
ing up: bit 4 at memory address FFECH) is used to set up the
warming up time. Warming up is executed for 2
lation time when this bit is set to “0”, while 2
time when set to “1”. This bit is cleared to “0” by reset opera-
tion.
14
clock oscil-
clock oscillation
16
Figure 3.4 (4). HALT Release Timing Using Interrupts in STOP Mode
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