參數(shù)資料
型號: TMP90CM38
廠商: Toshiba Corporation
元件分類: 通用總線功能
英文描述: High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM,ROM,General Serial Interface,Multifuction Timer/Event Counter,Signal Selector Circuit,PWM Output(高速、先進(jìn)的 CMOS 8位微控制器(芯片集成了8位A/D,D/A轉(zhuǎn)換器,ROM,RAM,通用串行接口,多功能定時器/事件計數(shù)器,信號選擇電路,PWM輸出))
中文描述: 采用先進(jìn)的CMOS高速8位微控制器,集成8位A / D,D / A轉(zhuǎn)換,內(nèi)存,光盤,通用串行接口,Multifuction定時器/事件計數(shù)器,信號選擇器電路,PWM輸出(高速,先進(jìn)的的CMOS 8位微控制器(芯片集成了8位A / D轉(zhuǎn)換,數(shù)/模轉(zhuǎn)換器,ROM和RAM內(nèi)存,通用串行接口,多功能定時器/事件計數(shù)器,信號選擇電路,脈寬調(diào)制輸出))
文件頁數(shù): 29/172頁
文件大小: 5946K
代理商: TMP90CM38
TOSHIBA CORPORATION
29
TMP90CM38
3.4 Standby Functions
When a HALT instruction is executed, TMP90CM38 enters the
RUN, IDLE1 or STOP mode according to the contents of the
halt mode setting register. The features are as follows:
(1)
Run:
Only the CPU halts, power consumption
remains unchanged.
(2)
IDLE: Only the internal oscillators operate, while all
other internal circuits halt. Power consump-
tion is 1/10 or less than that during normal
operation.
(3)
STOP: All internal circuits halt, including the internal
oscillator. Power consumption is extremely
reduced.
The HALT mode setting register WDMOD <HALTM1,0> is
assigned to bits 2 and 3 memory address FFECH in the built-in I/
O register area (all other bits are used to control other block func-
tions). The RUN mode (“00”) is entered by reseting.
These HALT states can be released by requesting an
interrupt or resetting. Table 3.4 (2) shows how to release the
HALT state. If the CPU is in the EI state for non-maskable or
maskable interrupt, the interrupt will be acknowledged by the
CPU and the CPU starts interrupt processing. If the CPU is in
the DI state fro maskable interrupt, the CPU starts the execu-
tion from the instruction following HALT instruction, but the
interrupt request flag remains at “1”.
Even when HALT state is released by reset operation, the
state (including the built-in RAM) just before entering the
HALT can be retained. However, if HALT instruction has
already been executed in the built-in RAM, the RAM contents
may not be retained.
Figure 3.4 (1). HALT Mode Setting Register
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TMP90CM40 High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CUP,A/D Converter,RAM,ROM,General Serial Interface,Multifuction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器(芯片集成了8位CPU,A/D,轉(zhuǎn)換器,ROM,RAM,通用串行接口,多功能定時器/事件計數(shù)器))
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