參數(shù)資料
型號： TMP90CM38
廠商： Toshiba Corporation
元件分類： 通用總線功能
英文描述： High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM，ROM，General Serial Interface,Multifuction Timer/Event Counter，Signal Selector Circuit,PWM Output(高速、先進的 CMOS 8位微控制器（芯片集成了8位A/D，D/A轉(zhuǎn)換器,ROM，RAM，通用串行接口，多功能定時器/事件計數(shù)器,信號選擇電路，PWM輸出）)
中文描述： 采用先進的CMOS高速8位微控制器，集成8位A / D，D / A轉(zhuǎn)換，內(nèi)存，光盤，通用串行接口，Multifuction定時器/事件計數(shù)器，信號選擇器電路，PWM輸出（高速，先進的的CMOS 8位微控制器（芯片集成了8位A / D轉(zhuǎn)換，數(shù)/模轉(zhuǎn)換器，ROM和RAM內(nèi)存，通用串行接口，多功能定時器/事件計數(shù)器，信號選擇電路，脈寬調(diào)制輸出））
文件頁數(shù)： 136/172頁
文件大?。?/td> 5946K
代理商： TMP90CM38
136
TOSHIBA CORPORATION
TMP90CM38
3.9.5 Explanation of Operations
The send, receive and simultaneous send-receive modes for
SCMOD2 <SMD1, SMD0>.
(1)
Send Mode
The first send data is written into buffer registers
SCBUF after the send mode is set in the command
register. (Data will not be written into the buffers if the
command register is not in send mode.) Then, storing
“1” into serial transfer control registers SCMOD2
<SIOE> starts the send. As the send starts, the send
data is synchronized with serial clock pulses and
sequentially output from the TxD2 pin on the LSB side.
At the same time, the send data is transferred from the
buffer registers to the shift registers. Since the buffer
registers are empty, buffer empty interrupt INTTX2 is
generated to request the next send data.
When the interrupt service program writes the next
send data into the buffer register, the interrupt request
signal isn’t cleared to “0”.
(Internal clock pulse)
In the internal clock operations, if all data is sent and
no subsequent data is stored in the register, the serial
clock pulse stops and a wait begins.
(External clock pulses)
In the internal clock operation, data must be stored in
the buffer registers before the next data shift operation
begins. The transfer speed in an interrupt service pro-
gram is determined by the maximum delay time from
the interrupt request generation to buffer register data
write.
To end a send, the buffer empty interrupt service pro-
gram disables (clears to “0”) serial transfer control reg-
ister SCMOD2 <SIO0E> instead of writing the next
send data. When serial transfer control is disabled, the
serial transfer ends when the send data now being
shifted out is finished being sent.
The end of send can be determined by the status of
serial transfer monitor flag SCMOD2 <FFSI>. In the
external clock operation, the serial transfer control reg-
ister SCMOD2 <SIOE> must be disabled before start-
ing the next send data shift operation.
If the serial transfer control register SCMOD2 <SIOE>
is not disabled before the shift operation begins, oper-
ations stop after sending the next send data (dummy).
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相關(guān)代理商/技術(shù)參數(shù)
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TMP90CM39T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
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