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參數(shù)資料
| 型號： | TDA8035HN/C1 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, SOT617-7, HVQFN-32 |
| 文件頁數(shù)： | 31/32頁 |
| 文件大?。?/td> | 908K |
| 代理商： | TDA8035HN/C1 |
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TDA8035HN
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1.0 — 19 April 2011
8 of 32
NXP Semiconductors
TDA8035HN
Smart card interface
8.2 Voltage supervisor
The voltage supervisor is used as a power on reset, and also as supply drop detection
during a card session. The threshold of the voltage supervisor is set internally in the IC for
VDDP and VREG whereas it can be adjusted externally for VDD(INTF) using the PORADJ pin.
As long as VREG is less than Vth(VREG) + Vhys(VREG), the IC will remain inactive whatever
the levels on the command lines are. This also lasts for the duration of tw after VREG has
reached a level higher than Vth(VREG) + Vhys(VREG).The outputs of the VDDP, VREG and
VDD(INTF) supervisors are combined and sent to a digital controller in order to reset the
TDA8035. This defined reset pulse of approximately 5.7 ms (tw=2048
× 1/(fosc(int)_Low)
is used internally for maintaining the IC in a inactive mode during the supply voltage
power-on; (see following pictures). When VREG falls below Vth(VREG) or when V
DD(INTF)falls below Vthextf or when VDDP falls below Vth(VDDP) , a deactivation sequence
is performed.
Fig 3.
Block voltage supervisor
001aan747
vbg
Vreg
VDDP
vreg
vbg
VDD(INTF)
vbg
Poradj
Deep_shutdown
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