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參數(shù)資料
| 型號： | TDA8035HN/C1 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, SOT617-7, HVQFN-32 |
| 文件頁數(shù)： | 3/32頁 |
| 文件大?。?/td> | 908K |
| 代理商： | TDA8035HN/C1 |
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TDA8035HN
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1.0 — 19 April 2011
11 of 32
NXP Semiconductors
TDA8035HN
Smart card interface
8.4 I/O circuitry
The three data lines I/O, AUX1 and AUX2 are identical.
The Idle state is realized by both lines (I/O and I/OUC) being pulled HIGH via a 10 k
resistor (I/O to VCC and I/OUC to VDD(INTF)).
I/O is referenced to VCC, and I/OUC to VDD(INTF), thus allowing operation with
VCC ≠ VDD(INTF).
The first side on which a falling edge occurs becomes the master. An anti-latch circuit
disables the detection of falling edges on the other line, which becomes a slave.
After a time delay td(edge), the logic 0 present on the master side is transmitted to the slave
side.
When the master side returns to logic 1, the slave side transmits the logic 1 during the
time delay tpu, and then both sides return to their Idle states.
This active pull-up feature ensures fast Low to High transitions; it is able to deliver more
than 1 mA up to an output voltage of 0.9 VCC on a 80 pF load. At the end of the active
pull-up pulse, the output voltage only depends on the internal pull-up resistor, and on the
load current.
The current to/from the cards I/O lines is internally limited to 15 mA.
The maximum frequency on these lines is 1.5 MHz.
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