- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373518 > SX48BD (Electronic Theatre Controls, Inc.) Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug PDF資料下載
參數(shù)資料
| 型號： | SX48BD |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug |
| 中文描述： | 配置通信控制器與電子工程/閃存程序存儲器，在系統(tǒng)編程能力，以及片上調(diào)試 |
| 文件頁數(shù)： | 39/58頁 |
| 文件大?。?/td> | 873K |
| 代理商： | SX48BD |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁當前第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁
2002 Ubicom, Inc. All rights reserved.
- 39 -
www.ubicom.com
SX48BD/SX52BD
A 2-bit field in the FUSEX register can be used to specify
the Delay Reset Timer (DRT) timeout period that results
in an automatic wake-up from the power down mode.
10 = 0.25 msec
11 = 18 msec (default)
00 = 60 msec
01 = 1 sec
For fast start-up from the power down mode, clear the
SLEEPCLK bit and set the WDRT1:WDRT0 field to 00.
This will keep the clock operating during the power down
mode and allow a minimum start-up delay.
Note 1: The external Power-On Reset circuit is required
only if V
dd
power-up is too slow. The diode D helps dis-
charge the capacitor quickly when V
dd
powers down and
comes back within a short period of time.
Note 2: R < 40 k
is recommended to make sure that
voltage drop across R does not violate the device electri-
cal specifications.
R1 = 100
to 1k
will limit any current flowing into MCLR
from external capacitor C. This helps prevent MCLR pin
breakdown due to Electrostatic Discharge (ESD) or Elec-
trical Overstress (EOS).
13.0
The on-chip brown-out detection circuitry resets the
device when V
dd
dips below the specified brown-out volt-
age. The device is held in reset as long as V
dd
stays
below the brown-out voltage. The device will come out of
reset when V
dd
rises above the brown-out voltage. The
brown-out level can be set to 2.2V, 2.4V, OR 4.1V levels
through BOR1:BOR0 bits in the FUSEX register.
BROWN-OUT DETECTOR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SX52BD | Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug |
| SX493 | Photomicrosensor |
| SX52 | 13.2MM SINGLE DIGIT NUMERIC DISPLAYS |
| SXA-3318B | 400-2500 MHz Balanced 1/2 W Medium Power GaAs HBT Amplifier with Active Bias |
| SXB-4089 | 400-2500 MHz 1/2 W Medium Power InGaP/GaAs HBT Amplifier with Active Bias |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SX48BD/TQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug |
| SX48BD-G | 功能描述:8位微控制器 -MCU RISC 75MHz 36I/O 262kB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| SX48BDITQ | 功能描述:8位微控制器 -MCU TQFP UBICOM MICRO RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| SX-49-0534 | 制造商:Amphenol Corporation 功能描述: |
| SX491 | 制造商:Mallory Sonalert Products Inc 功能描述:Cap Film 91pF 500V PS 5% (7.1 X 12mm) Axial 70°C |
發(fā)布緊急采購，3分鐘左右您將得到回復。