參數(shù)資料
型號(hào)： SX48BD
廠商： Electronic Theatre Controls, Inc.
英文描述： Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug
中文描述： 配置通信控制器與電子工程/閃存程序存儲(chǔ)器，在系統(tǒng)編程能力，以及片上調(diào)試
文件頁數(shù)： 36/58頁
文件大?。?/td> 873K
代理商： SX48BD
2002 Ubicom, Inc. All rights reserved.
- 36 -
www.ubicom.com
SX48BD/SX52BD
11.0
The device contains an on-chip differential comparator.
Ports RB0-RB2 support the comparator. Pins RB1 and
RB2 are the comparator negative and positive inputs,
respectively, while RB0 serves as the comparator output
pin. To use these pins in conjunction with the comparator,
the user program must configure RB1 and RB2 as inputs
and RB0 as an output. The CMP_B register is used to
enable the comparator, to read the output of the compar-
ator internally, and to enable the output of the comparator
to the comparator output pin.
The comparator enable bits are set to
“
1
”
upon reset,
thus disabling the comparator. To avoid drawing addi-
tional current during the power down mode, the compara-
tor should be disabled before entering the power down
mode. Here is an example of how to set up the compara-
tor and read the CMP_B register.
COMPARATOR
The final
“
mov
”
instruction in this example performs an
exchange of data between the working register (W) and
the CMP_B register. This exchange occurs only with
accesses to CMP_B and WKPEND_B. Otherwise, the
“
mov
”
instruction does not perform an exchange, but only
moves data from the source to the destination.
The following figure shows the format of the CMP_B reg-
ister.
CMP_B - Comparator Enable/Status Register
;enable RB0 as output
mov
mov
W,#$18
M,W
;set MODE register to access
;CMP_B
mov W,#$00
;clear W
mov !RB,W
;enable comparator and its
;output
...
;delay after enabling
;comparator for response
mov
mov
W,#$18
M,W
;set MODE register to access
;CMP_B
mov W,#$00
;clear W
mov !RB,W
;enable comparator and its
;output and also read CMP_B
;(exchange W and CMP_B)
and W,#$01
;set/clear Z flag based on
;comparator result
snb $03.2
;test Z flag in STATUS reg
;(0 => RB2<RB1)
jmp rb2_hi
;jump only if RB2>RB1
...
CMP_EN
Bit 7
CMP_OE
Bit 6
Reserved
Bits 5
–
1
CMP_RES
Bit 0
CMP_EN
When cleared to 0, enables the compar-
ator.
When cleared to 0, enables the compar-
ator output to the RB0 pin if RB0 is con-
figured as an output.
Comparator result (Read Only): 1 for
RB2>RB1 or 0 for RB2<RB1. Compara-
tor must be enabled (CMP_EN = 0) to
read the result. The result can be read
whether or not the CMP_OE bit is
cleared.
CMP_OE
CMP_RES
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參數(shù)描述
SX48BD/TQ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug
SX48BD-G 功能描述:8位微控制器 -MCU RISC 75MHz 36I/O 262kB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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SX-49-0534 制造商:Amphenol Corporation 功能描述:
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